ADAS3022* PRODUCT PAGE QUICK LINKS Last Content Update: 07/01/2017COMPARABLE PARTSREFERENCE MATERIALS View a parametric search of comparable parts. Press • Analog Devices’ Data Acquisition IC Simplifies Industrial EVALUATION KITS and Instrumentation Equipment Design • ADAS3022 Evaluation Kit Technical Articles • Exploring Different SAR ADC Analog Input Architectures DOCUMENTATION • Komplette Sensor-to-Bits-Lösung: Vereinfachte Data Sheet Entwicklung industrieller Datenerfassungssysteme • ADAS3022-EP: Enhanced Data Sheet • Let's Compare SAR & Δ-Σ Converters for a Mux'd DAS (Planet Analog, 12/2013) • ADAS3022: 16-Bit, 1 MSPS, 8-Channel Data Acquisition System Data Sheet • Sensor-To-Bits: Simplifying DAQ Design User GuidesDESIGN RESOURCES • UG-484: Evaluation Board for the ADAS3022 16-Bit, 8- Channel, 1 MSPS Data Acquisition System • ADAS3022 Material Declaration • PCN-PDN Information TOOLS AND SIMULATIONS • Quality And Reliability • ADAS3022 FPGA Reference Design • Symbols and Footprints • ADAS3022/ADAS3023 IBIS Model DISCUSSIONSREFERENCE DESIGNS View all ADAS3022 EngineerZone Discussions. • CN0201 SAMPLE AND BUY Visit the product page to see pricing options. TECHNICAL SUPPORT Submit a technical question or find your regional support number. DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview ADAS3022 Operation Transfer Function Typical Application Connection Diagram Analog Inputs Input Structure Programmable Gain Common-Mode Operating Range Fully Differential, Antiphase Signals with a Zero Common Mode Fully Differential, Antiphase Signals with a Nonzero Common Mode Differential, Nonantiphase Signals with a Zero Common Mode Single-Ended Signals with a Nonzero DC Offset (Asymmetrical) Single-Ended Signals with a 0 V DC Offset (Symmetrical) Multiplexer Channel Sequencer Auxiliary Input Channel Driver Amplifier Choice Voltage Reference Output/Input Internal Reference External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Core Supplies High Voltage Supplies Power Dissipation Modes Fully Operational Mode Power-Down Mode Conversion Modes Warp Mode (CMS = 0) Normal Mode (CMS = 1, Default) Digital Interface Conversion Control CNV Rising Edge—Start of a Conversion (SOC) BUSY Falling Edge—End of a Conversion (EOC) Reset and Power-Down (PD) Inputs Serial Data Interface CPHA Sampling on the SCK Falling Edge Sampling on the SCK Rising Edge (Alternate Edge) CFG Readback General Considerations Data Access During Conversion—Maximum Throughput General Timing Configuration Register On Demand Conversion Mode Channel Sequencer Details INx and COM Inputs (MUX = 1, TEMPB = 1) INx and COM Inputs with AUX Inputs (MUX = 0, TEMPB = 1) INx and COM Inputs with Temperature Sensor (MUX = 1, TEMPB = 0) INx and COM Inputs with AUX Inputs and Temperature Sensor (MUX = 0, TEMPB = 0) Sequencer Modes Basic Sequencer Mode (SEQ = 11) Update During Sequence (SEQ = 01) Advanced Sequencer Mode (SEQ = 10) Outline Dimensions Ordering Guide