Datasheet AD7656A (Analog Devices) - 7

link to page 7
AD7656A Data Sheet ABSOLUTE MAXIMUM RATINGS
T
POWER SUPPLY SEQUENCING
A = 25°C, unless otherwise noted. Simultaneous application of V
Table 3.
DD and VSS is necessary to guarantee reliability of the device. In the cases where
Parameter Rating
simultaneous application cannot be guaranteed, VDD must power VDD to AGND, DGND 0 V to +16.5 V up before VSS. When a negative voltage is applied to the analog VSS to AGND, DGND 0 V to −16.5 V inputs before VDD and VSS are ful y powered up, a 560 Ω resistor VDD to AVCC AVCC + 0.7 V to 16.5 V must be placed on the analog inputs. AVCC to AGND, DGND −0.3 V to +7 V DV A number of sequencing combinations can lead to temporary CC to AVCC −0.3 V to AVCC + 0.3 V DV high current states; however, when all supplies are powered up, CC to DGND, AGND −0.3 V to +7 V AGND to DGND −0.3 V to +0.3 V the device returns to normal operating currents. The analog V input (AIN) coming before AVCC causes temporary high current DRIVE to DGND −0.3 V to DVCC + 0.3 V Analog Input Voltage to AGND V on the analog inputs. Digital inputs before DVCC, and DVCC SS + 1 V to VDD − 1 V Digital Input Voltage to DGND −0.3 V to V before other supplies, also cause temporary high current states. DRIVE + 0.3 V Digital Output Voltage to DGND −0.3 V to VDRIVE + 0.3 V
THERMAL RESISTANCE
REFIN/REFOUT to AGND −0.3 V to AVCC + 0.3 V θJA is specified for the worst-case conditions, that is, a device Input Current to Any Pin Except Supplies1 ±10 mA soldered in a circuit board for surface-mount packages. These Operating Temperature Range −40°C to +85°C specifications apply to a 4-layer board. Storage Temperature Range −65°C to +150°C Junction Temperature 150°C
Table 4. Thermal Resistance
Pb/Sn Temperature, Soldering
Package Type θJA θJC Unit
Reflow (10 sec to 30 sec) 240(0)°C 64-Lead LQFP 45 11 °C/W Pb-Free Temperature, Soldering Reflow 260(0)°C 1 Transient currents of up to 100 mA do not cause SCR latch-up.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 6 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS POWER SUPPLY SEQUENCING THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS Track-and-Hold Amplifiers Analog Input ADC TRANSFER FUNCTION REFERENCE SECTION TYPICAL CONNECTION DIAGRAM DRIVING THE ANALOG INPUTS INTERFACE SECTION Parallel Interface (SER/PAR/SEL = 0) SOFTWARE SELECTION OF ADCS Changing the Analog Input Range (H/S SEL = 0) Changing the Analog Input Range (H/S SEL = 1) Serial Interface (SER/PAR/SEL = 1) SERIAL READ OPERATION DAISY-CHAIN MODE (DCEN = 1, SER//SEL = 1) Standby/Partial Power-Down Modes of Operation (SER/PAR/SEL = 0 or SER/PAR/SEL = 1) APPLICATION HINTS LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE