Datasheet ADAQ7980, ADAQ7988 (Analog Devices) - 9

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Data Sheet ADAQ7980/ADAQ7988 Parameter Test Conditions/Comments Min Typ Max Unit
Input Current Low (IIL) −1 +1 µA High (IIH) −1 +1 µA DIGITAL OUTPUTS Data Format Serial 16 bits straight binary Pipeline Delay Conversion results available immediately after completed conversion VOL ISINK = 500 µA 0.4 V VOH ISOURCE = −500 µA VIO − 0.3 V POWER-DOWN SIGNALING ADC Driver/Reference Buffer PD_AMP, PD_REF Voltage Low Powered down <1.5 V High Enabled >1.9 V Turn-Off Time 50% of PD_AMP, PD_REF to <10% of enabled 0.9 1.25 µs quiescent current Turn-On Time Specified performance 2 7.25 µs Dynamic Power Scaling Period Specified performance 10 µs LDO PD_LDO Voltage Low Powered down 1.06 1.12 1.18 V High Enabled 1.15 1.22 1.30 V PD_LDO Logic Hysteresis 100 mV Turn-Off Time 2.2 µF capacitive load 460 650 µs Turn-On Time 370 425 µs POWER REQUIREMENTS VDD 3.5 5 10 V LDO Voltage Accuracy ILDO_OUT = 10 mA, TA = 25°C −0.8 +0.8 % 100 µA < ILDO_OUT < 100 mA, VDD = 3.5 V to 10 V −1.8 +1.8 % LDO Line Regulation VDD = 3.5 V to 10 V −0.015 +0.015 %/V LDO Load Regulation ILDO_OUT = 100 µA to 100 mA 0.002 0.004 %/mA LDO Start-Up Time VLDO_OUT = 2.5 V 380 µs LDO Current-Limit Threshold 250 360 460 mA LDO Thermal Shutdown Threshold TJ rising 150 °C Hysteresis 15 °C LDO Dropout Voltage ILDO_OUT = 10 mA 30 60 mV ILDO_OUT = 100 mA 200 420 mV V+ 3.7 5 V− + 10 V V− V+ − 10 0 +0.1 V VIO 1.7 5.5 V Total Standby Current1, 2 Static, all devices enabled 1.1 1.7 mA ADC driver, REF buffer disabled 50 103 µA ADC driver, REF buffer, LDO disabled 7 23 µA ADAQ7980 Current Draw 1 MSPS VIO 0.3 0.34 mA V+/V− 1.3 2.0 mA VDD 1.45 1.6 mA Rev. A | Page 9 of 49 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY CONFIGURATION SINGLE-SUPPLY CONFIGURATION TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ADC DRIVER INPUT INPUT PROTECTION NOISE CONSIDERATIONS AND SIGNAL SETTLING OPERATION DYNAMIC POWER SCALING (DPS) SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE VOLTAGE REFERENCE INPUT POWER SUPPLY LDO REGULATOR CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION LDO REGULATOR THERMAL CONSIDERATIONS DIGITAL INTERFACE 3-WIRE MODE WITHOUT THE BUSY INDICATOR 3-WIRE MODE WITH THE BUSY INDICATOR 4-WIRE MODE WITHOUT THE BUSY INDICATOR 4-WIRE MODE WITH THE BUSY INDICATOR CHAIN MODE WITHOUT THE BUSY INDICATOR CHAIN MODE WITH THE BUSY INDICATOR APPLICATION CIRCUITS NONUNITY GAIN CONFIGURATIONS INVERTING CONFIGURATION WITH LEVEL SHIFT USING THE ADAQ7980/ADAQ7988 WITH ACTIVE FILTERS APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE ADAQ7980/ADAQ7988 OUTLINE DIMENSIONS ORDERING GUIDE