Datasheet ADAQ7980, ADAQ7988 (Analog Devices) - 3

ADAQ7980/ADAQ7988 Data Sheet SPECIFICATIONS DUAL-SUPPLY CONFIGURATION
VDD = 3.5 V to 10 V, V+ = 6.3 V to 7.7 V, V− = −2.5 V to −0.2 V, VIO = 1.7 V to 5.5 V, VREF = 5 V, TA = −55°C to +125°C, ADC driver in a unity-gain buffer configuration, fSAMPLE = 1 MSPS (ADAQ7980), and fSAMPLE = 500 kSPS (ADAQ7988), unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
RESOLUTION 16 Bits SYSTEM ACCURACY No Missing Codes 16 Bits Differential Nonlinearity Error (DNL) −14 ±7 +14 ppm1 Integral Nonlinearity Error (INL) −20 ±8 +20 ppm1 Transition Noise 0.6 LSB1 rms Gain Error TA = 25°C −0.01 ±0.002 +0.01 %FS Gain Error Temperature Drift 0.1 0.4 ppm/°C Zero Error TA = 25°C −0.5 ±0.06 +0.5 mV Zero Error Temperature Drift 0.3 1.3 µV/°C Common-Mode Rejection Ratio ADC driver configured as difference amplifier 103 130 dB Power Supply Rejection Ratio Positive V+ = +6.3 V to +8 V, V− = −2 V 75 105 dB Negative V+ = +7 V, V− = −1.0 V to −2.5 V 80 110 dB SYSTEM AC PERFORMANCE Dynamic Range 92 dB2 VREF = 2.5 V 87 dB2 Total RMS Noise 44.4 µV rms Oversampled Dynamic Range Oversample dynamic range frequency (fODR) = 10 kSPS 111 dB2 Signal-to-Noise Ratio (SNR) Input frequency (fIN) = 10 kHz 90.5 91.5 dB2 fIN = 10 kHz, VREF = 2.5 V 84.5 86.5 dB2 Spurious-Free Dynamic Range fIN = 10 kHz 106 dB2 Total Harmonic Distortion (THD) fIN = 10 kHz −105 −100 dB2 Signal-to-Noise-and-Distortion Ratio fIN = 10 kHz 90 91 dB2 fIN = 10 kHz, VREF = 2.5 V 84 86 dB2 Effective Number of Bits fIN = 10 kHz 14.65 14.8 Bits Noise Free Code Resolution 14.1 Bits SYSTEM SAMPLING DYNAMICS Conversion Rate ADAQ7980 VIO ≥ 3.0 V 0 1 MSPS VIO ≥ 1.7 V 0 833 kSPS ADAQ7988 VIO ≥ 1.7 V 0 500 kSPS Transient Response Full-scale step 430 500 ns −3 dB Input Bandwidth ADC driver RC filter 4.42 MHz −1 dB Frequency ADC driver RC filter 2.2 MHz −0.1 dB Frequency ADC driver RC filter 0.67 MHz 0.1 Hz to 10 Hz Voltage Noise 17 µV p-p Aperture Delay 2.0 ns Aperture Jitter 2.0 ns 1 LSB means least significant bit. With the 5 V input range, 1 LSB is 76.3 µV and 1 LSB = 15.26 ppm. 2 All specifications in dB are referred to a full-scale input, FSR. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified. Rev. A | Page 3 of 49 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY CONFIGURATION SINGLE-SUPPLY CONFIGURATION TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ADC DRIVER INPUT INPUT PROTECTION NOISE CONSIDERATIONS AND SIGNAL SETTLING OPERATION DYNAMIC POWER SCALING (DPS) SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE VOLTAGE REFERENCE INPUT POWER SUPPLY LDO REGULATOR CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION LDO REGULATOR THERMAL CONSIDERATIONS DIGITAL INTERFACE 3-WIRE MODE WITHOUT THE BUSY INDICATOR 3-WIRE MODE WITH THE BUSY INDICATOR 4-WIRE MODE WITHOUT THE BUSY INDICATOR 4-WIRE MODE WITH THE BUSY INDICATOR CHAIN MODE WITHOUT THE BUSY INDICATOR CHAIN MODE WITH THE BUSY INDICATOR APPLICATION CIRCUITS NONUNITY GAIN CONFIGURATIONS INVERTING CONFIGURATION WITH LEVEL SHIFT USING THE ADAQ7980/ADAQ7988 WITH ACTIVE FILTERS APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE ADAQ7980/ADAQ7988 OUTLINE DIMENSIONS ORDERING GUIDE