Datasheet LT3761A (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung60VIN LED Controller with Internal PWM Generator
Seiten / Seite30 / 8 — pin FuncTions. PWMOUT (Pin 1):. CTRL (Pin 6):. FB (Pin 2):. REF (Pin 7):. …
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DokumentenspracheEnglisch

pin FuncTions. PWMOUT (Pin 1):. CTRL (Pin 6):. FB (Pin 2):. REF (Pin 7):. PWM (Pin 8):. SN (Pin 3):. ISP (Pin 4):. C (Pin 5):

pin FuncTions PWMOUT (Pin 1): CTRL (Pin 6): FB (Pin 2): REF (Pin 7): PWM (Pin 8): SN (Pin 3): ISP (Pin 4): C (Pin 5):

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LT3761A
pin FuncTions PWMOUT (Pin 1):
Buffered Version of PWM Signal for PWM is low. This feature allows the VC pin to store the Driving LED Load Disconnect NMOS or Level Shift. This demand current state variable for the next PWM high pin also serves in a protection function for the FB over- transition. Connect a capacitor between this pin and GND; voltage condition—will toggle if the FB input is greater a resistor in series with the capacitor is recommended for than the FB regulation voltage (VFB) plus 60mV (typical). fast transient response. The PWMOUT pin is driven from INTVCC. Use of a FET
CTRL (Pin 6):
Current Sense Threshold Adjustment Pin. with gate cut-off voltage higher than 1V is recommended. Constant current regulation point VISP-ISN is one-fourth
FB (Pin 2):
Voltage Loop Feedback Pin. FB is intended for VCTRL plus an offset for 0V ≤ CTRL ≤ 1V. For CTRL > constant-voltage regulation or for LED protection and open 1.2V the VISP-ISN current regulation point is constant at LED detection. The internal transconductance amplifier with the full-scale value of 250mV. For 1V ≤ CTRL ≤ 1.2V, the output VC will regulate FB to 1.25V (nominal) through the dependence of VISP-ISN upon CTRL voltage transitions from DC/DC converter. If the FB input exceeds the regulation a linear function to a constant value, reaching 98% of full- voltage, VFB, minus 50mV and the voltage between ISP scale value by CTRL = 1.1V. Do not leave this pin open. and ISN has dropped below the C/10 threshold of 25mV
V
(typical), the OPENLED pull-down is asserted. This action
REF (Pin 7):
Voltage Reference Output Pin, Typically 2V. This pin drives a resistor divider for the CTRL pin, either may signal an open LED fault. If FB is driven above the FB for analog dimming or for temperature limit/compensation overvoltage threshold, the PWMOUT and GATE pins will be of LED load. It can be bypassed with 10nF or greater, or driven low to protect the LEDs from an overcurrent event. less than 50pF. Can supply up to 185µA (typical). Do not leave the FB pin open. If not used, connect to GND.
PWM (Pin 8): I
A signal low turns off switcher, idles the
SN (Pin 3):
Connection Point for the Negative Terminal of the Current Feedback Resistor. The constant output oscillator and disconnects the VC pin from all internal current regulation can be programmed by I loads. PWMOUT pin follows the PWM pin, except in fault LED = 250mV/ R conditions. The PWM pin can be driven with a digital LED when CTRL > 1.2V or ILED = (CTRL – 100mV)/(4 • R signal to cause pulse width modulation (PWM) dimming LED). If ISN is greater than INTVCC, input bias current is typically 20μA flowing into the pin. Below INTV of an LED load. The digital signal should be capable of CC, ISN bias current decreases until it flows out of the pin. sourcing or sinking 200μA at the high and low thresholds. During start-up when DIM/SS is below 1V, the first rising
ISP (Pin 4):
Connection Point for the Positive Terminal of edge of PWM enables switching which continues until the Current Feedback Resistor. Input bias current depends VISP-ISN ≥ 25mV or SS ≥ 1V. Connecting a capacitor from upon CTRL pin voltage. When it is greater than INTVCC PWM pin to GND invokes a self-driving oscillator where it flows into the pin. Below INTVCC, ISP bias current internal pull-up and pull-down currents set a duty ratio decreases until it flows out of the pin. If the difference for the PWMOUT pin for dimming LEDs. The magnitude between ISP and ISN exceeds 600mV (typical), then an of the pull-up/down currents is set by the current in the overcurrent event is detected. In response to this event, DIM/SS pin. The capacitor on PWM sets the frequency of the GATE and PWMOUT pins are driven low to protect the dimming signal. For hiccup mode response to output the switching regulator, a 15mA pull-down on PWM and short-circuit faults, connect this pin as shown in the ap- a 9mA pull-down on the DIM/SS pin are activated for 4µs. plication titled Boost LED Driver with Output Short-Circuit
V
Protection. If not used, connect the PWM pin to INTV
C (Pin 5):
Transconductance Error Amplifier Output Pin CC Used to Stabilize the Switching Regulator Control Loop through a 1k resistor. with an RC Network. The VC pin is high impedance when 3761af 8 For more information www.linear.com/LT3761A Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts