Datasheet LT3746 (Analog Devices) - 5

HerstellerAnalog Devices
Beschreibung32-Channel 20mA LED Driver with Buck Controller
Seiten / Seite28 / 5 — TiMing characTerisTics. The. denotes the specifications which apply over …
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TiMing characTerisTics. The. denotes the specifications which apply over the full operating

TiMing characTerisTics The denotes the specifications which apply over the full operating

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LT3746
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, VCC = 3V to 5.5V, VEN/UVLO = 1.5V, VFB = 1.5V, VISP = VISN = 5V, VLEDxx = 0.5V, RT = 105k, RISET = 60.4k, CCAP = 0.47µF to VIN, CSCKO = CSDO = CLDO = 27pF to GND, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSCKI Data Shift Clock Frequency l 30 MHz fPWMCK PWMCK Clock Frequency l 25 MHz tWH-CKI SCKI Pulse Duration SCKI = H (Figure 3) l 16 ns tWL-CKI SCKI = L (Figure 3) l 16 ns tWH-PWM PWMCK Pulse Duration PWMCK = H (Figure 4) l 20 ns tWL-PWM PWMCK = L (Figure 4) l 20 ns tWH-LDI LDI Pulse Duration LDI = H (Figure 3) l 20 ns tSU-SDI SDI-SCKI Setup Time SDI – SCKI ↑ (Figure 3) l 2 ns tHD-SDI SCKI-SDI Hold Time SCKI ↑ – SDI (Figure 3) l 2 ns tSU-LDI SCKI-LDI Setup Time SCKI ↓ – LDI ↑ (Figure 3) l 5 ns tHD-LDI LDI-SCKI Hold Time LDI ↓ – SCKI ↑ (Figure 3) l 15 ns tPD-SCK↑ SCKI-SCKO Propagation Delay (Rising) SCKI ↑ – SCKO ↑ (Figure 3) l 27 44 ns tPD-SCK↓ SCKI-SCKO Propagation Delay (Fal ing) SCKI ↓ – SCKO ↓ (Figure 3) l 30 50 ns ∆tPD-SCK SCK Duty Cycle Change ∆tPD-SCK = tPD-SCK↑ – tPD-SCK↓ –3 ns tPD-SD SCKO-SDO Propagation Delay SCKO ↑ – SDO (Figure 3) l 2.2 4.5 7 ns tPD-LD↑ LDI-LDO Propagation Delay (Rising) LDI ↑ – LDO ↑ (Figure 3) l 27 44 ns tPD-LD↓ LDI-LDO Propagation Delay (Fal ing) LDI ↓ – LDO ↓ (Figure 3) l 30 50 ns ∆tPD-LD LD Duty Cycle Change ∆tPD-LD = tPD-LD↑ – tPD-LD↓ –3 ns tPD-PWM PWMCK-LED Propagation Delay PWMCK ↑ – ILED (Figure 4) 80 ns tR-SO SCKO/SDO/LDO Rise Time CLOAD = 27pF, 10% to 90% 3 ns tF-SO SCKO/SDO/LDO Fal Time CLOAD = 27pF, 90% to 10% 3 ns
Table 1. Test Parameter Equations
IOUT(MAX)(0−31)–IOUT(MIN)(0−31)•100 2 • I (1) OUTavg(0−31) I ΔI OUT(AVG)(0−31) – IOUT(CAL) LEDD(%) = •100 I (2) OUT(CAL) ⎛ 1.205V⎞ IOUT(CAL) =1000•⎝⎜ RISET ⎠⎟ (3) I ∆I OUTn VCC=5.5V – IOUTn VCC=3.0V LINE(% / V) = • 100 (4) I 2.5V OUTn VCC=3.0V I ∆I OUTn VOUTn=2.5V – IOUTn VOUTn=0.5V LOAD(% / V) = • 100 (5) I 2.0V OUTn VOUTn=0.5V 3746fa For more information www.linear.com/3746 5 Document Outline Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Pin Functions Block Diagram Applications Information Typical Application Related Parts