Datasheet ADR420, ADR421, ADR423, ADR425 (Analog Devices) - 9

Data Sheet ADR420/ADR421/ADR423/ADR425 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TP 1 ADR420/ 8 TP ADR421/ VIN 2 7 NIC ADR423/ NIC 3 ADR425 6 VOUT TOP VIEW GND 4 (Not to Scale) 5 TRIM
2 0 0
NIC = NO INTERNAL CONNECTION
2- 43
TP = TEST PIN (DO NOT CONNECT)
02 Figure 2. 8-Lead SOIC, 8-Lead MSOP Pin Configuration
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
1, 8 TP Test Pin. There are actual connections in TP pins, but they are reserved for factory testing purposes. Users should not connect anything to TP pins; otherwise, the device may not function properly. 2 VIN Input Voltage. 3, 7 NIC No Internal Connect. NICs have no internal connections. 4 GND Ground Pin = 0 V. 5 TRIM Trim Terminal. It can be used to adjust the output voltage over a ±0.5% range without affecting the temperature coefficient. 6 VOUT Output Voltage. Rev. J | Page 9 of 24 Document Outline Features Applications Pin Configuration General Description ADR42x Products Revision History Specifications ADR420 Electrical Specifications ADR421 Electrical Specifications ADR423 Electrical Specifications ADR425 Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Device Power Dissipation Considerations Basic Voltage Reference Connections Noise Performance Turn-On Time Applications Output Adjustment Reference for Converters in Optical Network Control Circuits High Voltage Floating Current Source Kelvin Connections Dual-Polarity References Programmable Current Source Programmable DAC Reference Voltage Precision Voltage Reference for Data Converters Precision Boosted Output Regulator Outline Dimensions Ordering Guide