Datasheet LTC2945 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | Wide Range I2C Power Monitor |
| Seiten / Seite | 34 / 5 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| Dateiformat / Größe | PDF / 815 Kb |
| Dokumentensprache | Englisch |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating
Modelllinie für dieses Datenblatt
- LTC2945CMS#PBF LTC2945CMS#PBF LTC2945CMS#TRPBF LTC2945CMS#TRPBF LTC2945CMS-1#PBF LTC2945CMS-1#PBF LTC2945CMS-1#TRPBF LTC2945CMS-1#TRPBF LTC2945CUD#PBF LTC2945CUD#PBF LTC2945CUD#TRPBF LTC2945CUD#TRPBF LTC2945CUD-1#PBF LTC2945CUD-1#PBF LTC2945CUD-1#TRPBF LTC2945CUD-1#TRPBF LTC2945HMS#PBF LTC2945HMS#PBF LTC2945HMS#TRPBF LTC2945HMS#TRPBF LTC2945HMS-1#PBF LTC2945HMS-1#PBF LTC2945HMS-1#TRPBF LTC2945HMS-1#TRPBF LTC2945HUD#PBF LTC2945HUD#PBF LTC2945HUD#TRPBF LTC2945HUD#TRPBF LTC2945HUD-1#PBF LTC2945HUD-1#PBF LTC2945HUD-1#TRPBF LTC2945HUD-1#TRPBF LTC2945IMS#PBF LTC2945IMS#PBF LTC2945IMS#TRPBF LTC2945IMS#TRPBF LTC2945IMS-1#PBF LTC2945IMS-1#PBF LTC2945IMS-1#TRPBF LTC2945IMS-1#TRPBF LTC2945IUD#PBF LTC2945IUD#PBF LTC2945IUD#TRPBF LTC2945IUD#TRPBF LTC2945IUD-1#PBF LTC2945IUD-1#PBF LTC2945IUD-1#TRPBF LTC2945IUD-1#TRPBF
Textversion des Dokuments
LTC2945
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD is from 4V to 80V unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I2C INTERFACE TIMING
fSCL(MAX) Maximum SCL Clock Frequency 400 kHz tLOW Minimum SCL Low Period 0.65 1.3 µs tHIGH Minimum SCL High Period 50 600 ns tBUF(MIN) Minimum Bus Free Time Between Stop/Start 0.12 1.3 µs Condition tHD,STA(MIN) Minimum Hold Time After (Repeated) Start 140 600 ns Condition tSU,STA(MIN) Minimum Repeated Start Condition Set-Up 30 600 ns Time tSU,STO(MIN) Minimum Stop Condition Set-Up Time 30 600 ns tHD,DATI(MIN) Minimum Data Hold Time Input –100 0 ns tHD,DATO(MIN) Minimum Data Hold Time Output 300 600 900 ns tSU,DAT(MIN) Minimum Data Set-Up Time 30 100 ns tSP(MAX) Maximum Suppressed Spike Pulse Width 50 110 250 ns tRST Stuck Bus Reset Time SCL or SDAI Held Low 25 33 ms CX SCL, SDAI Input Capacitance (Note 5) 5 10 pF
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Internal clamps limit the SCL and SDAI pins to a minimum of 5.9V. may cause permanent damage to the device. Exposure to any Absolute Driving these pins to voltages beyond the clamp may damage the part. The Maximum Rating condition for extended periods may affect device pins can be safely tied to higher voltages through resistors that limit the reliability and lifetime. current below 5mA.
Note 2:
All currents into pins are positive. All voltages are referenced to
Note 5:
Guaranteed by design and not subject to test. ground, unless otherwise noted.
Note 6:
(ACTUAL CODE−IDEAL CODE)
Note 3:
An internal shunt regulator limits the INTV TUE = ×100% CC pin to a minimum of 4096 5.9V. Driving this pin to voltages beyond 5.9V may damage the part. This where IDEAL CODE is derived from a straight line passing through Code 0 pin can be safely tied to higher voltages through a resistor that limits the at 0V and Theoretical Code of 4096 at VFS. current below 35mA.
Note 7:
ΔSENSE is defined as VSENSE+ – VSENSE– 2945fb For more information www.linear.com/LTC2945 5
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD is from 4V to 80V unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I2C INTERFACE TIMING
fSCL(MAX) Maximum SCL Clock Frequency 400 kHz tLOW Minimum SCL Low Period 0.65 1.3 µs tHIGH Minimum SCL High Period 50 600 ns tBUF(MIN) Minimum Bus Free Time Between Stop/Start 0.12 1.3 µs Condition tHD,STA(MIN) Minimum Hold Time After (Repeated) Start 140 600 ns Condition tSU,STA(MIN) Minimum Repeated Start Condition Set-Up 30 600 ns Time tSU,STO(MIN) Minimum Stop Condition Set-Up Time 30 600 ns tHD,DATI(MIN) Minimum Data Hold Time Input –100 0 ns tHD,DATO(MIN) Minimum Data Hold Time Output 300 600 900 ns tSU,DAT(MIN) Minimum Data Set-Up Time 30 100 ns tSP(MAX) Maximum Suppressed Spike Pulse Width 50 110 250 ns tRST Stuck Bus Reset Time SCL or SDAI Held Low 25 33 ms CX SCL, SDAI Input Capacitance (Note 5) 5 10 pF
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Internal clamps limit the SCL and SDAI pins to a minimum of 5.9V. may cause permanent damage to the device. Exposure to any Absolute Driving these pins to voltages beyond the clamp may damage the part. The Maximum Rating condition for extended periods may affect device pins can be safely tied to higher voltages through resistors that limit the reliability and lifetime. current below 5mA.
Note 2:
All currents into pins are positive. All voltages are referenced to
Note 5:
Guaranteed by design and not subject to test. ground, unless otherwise noted.
Note 6:
(ACTUAL CODE−IDEAL CODE)
Note 3:
An internal shunt regulator limits the INTV TUE = ×100% CC pin to a minimum of 4096 5.9V. Driving this pin to voltages beyond 5.9V may damage the part. This where IDEAL CODE is derived from a straight line passing through Code 0 pin can be safely tied to higher voltages through a resistor that limits the at 0V and Theoretical Code of 4096 at VFS. current below 35mA.
Note 7:
ΔSENSE is defined as VSENSE+ – VSENSE– 2945fb For more information www.linear.com/LTC2945 5