Datasheet LTC3823 (Analog Devices) - 7

LTC3823
PIN FUNCTIONS (UH/GN) VRNG (Pin 1/Pin 5):
Sense Voltage Range Input. The volt-
PLLFLTR (Pin 12/Pin 14):
The phase-locked loop’s lowpass age at this pin is ten times the nominal sense voltage at fi lter is tied to this pin. The voltage at this pin defaults to maximum output current and can be set from 0.5V to 2V 1.180V when the IC is not synchronized with an external by a resistive divider from INTVCC. The nominal sense clock at the PLLIN pin. voltage defaults to 50mV when this pin is tied to ground
PLLIN (Pin 13/Pin 15):
External Synchronization Input to and 200mV when tied to INTVCC. Do not set this voltage Phase Detector. This pin is internally terminated to SGND between 0.5V to ground and 2V to INTVCC. with a 50k resistor.
VFB (Pin 2/Pin 6):
Error Amplifi er Feedback Input. This pin
V
connects the error amplifi er input to an external resistive
IN (Pin 14/Pin 16):
Main Input Supply. Decouple this to PGND with a capacitor (0.1μF to 1μF). divider from VOUT.
V I INSNS (Pin 15, UH Package):
VIN Voltage Sense Input.
TH (Pin 3/Pin 7):
Current Control Threshold and Error Normally this pin is tied to V Amplifi er Compensation Point. The current comparator IN. However, in certain ap- plications when the IC is powered from a separate supply, threshold increases with this control voltage. The voltage V ranges from 0V to 2.4V with 0.75V corresponding to zero INSNS is tied to the upper MOSFET supply to sense the V sense voltage (zero current). IN voltage. This pin is co-bonded with VIN in the GN package.
SGND (Pin 4/Pin 8):
Signal Ground. All small-signal
ZV
components and compensation components should
CC (Pin 16/Pin 17):
Post-Package Zener Trim Supply. Under normal conditions this pin should always be con- connect to this ground, which in turn, connects to PGND nected to INTV at one point. CC.
Z1/SS I ENABLE (Pin 17/Pin 18):
Post-Package Zener Trim
ON (Pin 5/Pin 9):
On-Time Current Input. Tie a resistor Control. This pin is a multifunctional pin used in produc- from this pin to ground to set the one-shot timer current tion for post-package trimming and tracking. Ground this and thereby, set the switching frequency. pin under normal soft-start operation. Connecting this
VDIFFOUT (Pin 6/Pin 10):
Output of Remote Sensing Dif- pin to INTVCC will turn off the soft-start current during ferential Amplifi er. Connect this to VFB directly or through tracking. a resistive divider.
Z2 (Pin 18/Pin 19):
Post-Package Zener Trim Control.
VOUTSENSE+ (Pin 8/Pin 11):
This is the positive sense pin This pin is used in production for post-package trimming. for the remote sense differential amplifi er. Connect this pin Ground this pin under normal operation. to the positive terminal of the output load capacitor.
INTVCC (Pin 19/Pin 20):
Internal 5V Regulated Output. The
VOUTSENSE– (Pin 9/Pin 12):
This is the negative sense pin control circuits are powered from this voltage. Decouple for the remote sense differential amplifi er. Connect this pin this pin to PGND with a minimum of 4.7μF low ESR tan- to the negative terminal of the output load capacitor. talum or ceramic capacitor.
NC (Pins 7, 10, UH Package):
No Connect.
DRVCC (Pin 20, UH Package):
Driver Voltage Input. Must
TRACK/SS (Pin 11/Pin 13):
Output Voltage Tracking and be connected to INTVCC externally. Do not exceed 7V at Soft-Start Input. When the IC is confi gured to be the this pin. This pin is co-bonded to INTVCC internally in the master of two outputs, a capacitor to ground at this pin GN package. sets the ramp rate for the output voltage. When the IC is
BG (Pin 21/Pin 21):
Bottom Gate Driver Output. This pin confi gured to be the slave of two outputs, the VFB voltage drives the gate of the bottom N-channel MOSFET between of the master IC is reproduced by a resistive divider and ground and INTVCC. applied to this pin during the soft-start phase. An internal 1.7μA soft-start current is charging this pin during the soft-start phase. 3823fd 7