Datasheet LTC3801, LTC3801B (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungMicropower Constant Frequency Step-Down DC/DC Controllers in ThinSOT
Seiten / Seite12 / 10 — APPLICATIO S I FOR ATIO. Setting Output Voltage. Figure 4. Setting Output …
Dateiformat / GrößePDF / 243 Kb
DokumentenspracheEnglisch

APPLICATIO S I FOR ATIO. Setting Output Voltage. Figure 4. Setting Output Voltage. Efficiency Considerations

APPLICATIO S I FOR ATIO Setting Output Voltage Figure 4 Setting Output Voltage Efficiency Considerations

Modelllinie für dieses Datenblatt

Textversion des Dokuments

LTC3801/LTC3801B
U U W U APPLICATIO S I FOR ATIO
surface mount configurations. In the case of tantalum, it is Although all dissipative elements in the circuit produce critical that the capacitors are surge tested for use in losses, four main sources usually account for most of the switching power supplies. An excellent choice is the AVX losses in LTC3801/LTC3801B circuits: 1) LTC3801/ TPS, AVX TPSV and KEMET T510 series of surface mount LTC3801B DC bias current, 2) MOSFET gate charge cur- tantalum, available in case heights ranging from 2mm to rent, 3) I2R losses and 4) voltage drop of the output diode. 4mm. Other capacitor types include Sanyo OS-CON, 1. The V Nichicon PL series and Panasonic SP. IN current is the DC supply current, given in the electrical characteristics, that excludes MOSFET driver and control currents. V
Setting Output Voltage
IN current results in a small loss which increases with VIN. The LTC3801/LTC3801B develop a 0.8V reference voltage 2. MOSFET gate charge current results from switching the between the feedback (Pin 3) terminal and ground (see gate capacitance of the power MOSFET. Each time a Figure 4). By selecting resistor R1, a constant current is MOSFET gate is switched from low to high to low again, caused to flow through R1 and R2 to set the overall output a packet of charge dQ moves from V voltage. The regulated output voltage is determined by: IN to ground. The resulting dQ/dt is a current out of VIN which is typically  R2 much larger than the DC supply current. In continuous VOUT = 0 8 . 1+  mode, I R  1 GATECHG = (f)(dQ). 3. I2R losses are predicted from the DC resistances of the For most applications, an 80k resistor is suggested for R1. MOSFET, inductor and current shunt. In continuous In applications where low no-load quiescent current is mode the average output current flows through L but is critical, R1 should be made >400k to limit the feedback “chopped” between the P-channel MOSFET (in series divider current to approximately 10% of the chip quiescent with RSENSE) and the output diode. The MOSFET RDS(ON) current. If R2 then results in a very high impedance, it may plus RSENSE multiplied by duty cycle can be summed with be beneficial to bypass R2 with a 5pF to 10pF capacitor. To the resistances of L and RSENSE to obtain I2R losses. prevent stray pickup, locate resistors R1 and R2 close to LTC3801/LTC3801B. 4. The output diode is a major source of power loss at high currents and gets worse at high input voltages. The VOUT diode loss is calculated by multiplying the forward LTC3801/ LTC3801B R2 voltage times the diode duty cycle multiplied by the load 3 VFB current. For example, assuming a duty cycle of 50% R1 with a Schottky diode forward voltage drop of 0.4V, the loss increases from 0.5% to 8% as the load current 3801 F04 increases from 0.5A to 2A.
Figure 4. Setting Output Voltage
5. Transition losses apply to the external MOSFET and increase at higher operating frequencies and input
Efficiency Considerations
voltages. Transition losses can be estimated from: The efficiency of a switching regulator is equal to the Transition Loss = 2(VIN)2IO(MAX)CRSS(f) output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what Other losses including CIN and COUT ESR dissipative is limiting the efficiency and which change would produce losses, and inductor core losses, generally account for the most improvement. Efficiency can be expressed as: less than 2% total additional loss. Efficiency = 100% – (η1 + η2 + η3 + ...) where η1, η2, etc. are the individual losses as a percent- age of input power. sn3801 3801fs 10