Datasheet LTC3731 (Analog Devices) - 4
| Hersteller | Analog Devices |
| Beschreibung | 3-Phase, 600kHz, Synchronous Buck Switching Regulator Controller |
| Seiten / Seite | 34 / 4 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| Dateiformat / Größe | PDF / 384 Kb |
| Dokumentensprache | Englisch |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating
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LTC3731
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VRUN/SS RUN/SS Pin ON Threshold VRUN/SS, Ramping Positive 1 1.5 1.9 V VRUN/SSARM RUN/SS Pin Arming Threshold VRUN/SS, Ramping Positive Until Short-Circuit 3.8 4.5 V Latch-Off is Armed VRUN/SSLO RUN/SS Pin Latch-Off Threshold VRUN/SS, Ramping Negative 3.2 V ISCL RUN/SS Discharge Current Soft-Short Condition VEAIN = 0.375V, VRUN/SS = 4.5V –5 –1.5 µA ISDLHO Shutdown Latch Disable Current VEAIN = 0.375V, VRUN/SS = 4.5V 1.5 5 µA ISENSE SENSE Pins Source Current SENSE1+, SENSE1–, SENSE2+, SENSE2–, SENSE3+, 13 20 µA SENSE3– All Equal 1.2V; Current at Each Pin DFMAX Maximum Duty Factor In Dropout, VSENSEMAX ≤ 30mV 95 98.5 % TG tR,tF Top Gate Rise Time CLOAD = 3300pF 30 90 ns Top Gate Fall Time CLOAD = 3300pF 40 90 ns BG tR, tF Bottom Gate Rise Time CLOAD = 3300pF 30 90 ns Bottom Gate Fall Time CLOAD = 3300pF 20 90 ns TG/BG t1D Top Gate Off to Bottom Gate On Delay All Controllers, CLOAD = 3300pF Each Driver 50 ns Synchronous Switch-On Delay Time BG/TG t2D Bottom Gate Off to Top Gate On Delay All Controllers, CLOAD = 3300pF Each Driver 60 ns Top Switch-On Delay Time tON(MIN) Minimum On-Time Tested with a Square Wave (Note 5) 110 ns
Power Good Output Indication
VPGL PGOOD Voltage Output Low IPGOOD = 2mA, G Package 0.1 0.3 V IPGOOD = 1.6mA, UH Package 0.5 1.0 V IPGOOD PGOOD Output Leakage VPGOOD = 5V, G Package 1 µA IPGOOD PGOOD/PHASMD Bias I 0 ≤ VPHASMD/PG ≤ VCC, UH Package –10 ±3 10 µA PGOOD Trip Thresholds VDIFFOUT with Respect to Set Output Voltage, VPGTHNEG VDIFFOUT Ramping Negative HGOOD Goes Low After VUVDLY Delay –7 –10 –13 % VPGTHPOS VDIFFOUT Ramping Positive 7 10 13 % VPGDLY Power Good Fault Report Delay After VEAIN is Forced Outside the PGOOD Thresholds 100 150 µs
Oscillator and Phase-Locked Loop
fNOM Nominal Frequency VPLLFLTR = 1.2V 360 400 440 kHz fLOW Lowest Frequency VPLLFLTR = 0V 190 225 260 kHz fHIGH Highest Frequency VPLLFLTR = 2.4V 600 680 750 kHz VPLLTH PLLIN Input Threshold Minimum Pulse Width > 100ns 1 V RPLLIN PLLIN Input Resistance 50 kΩ IPLLFLTR Phase Detector Output Current Sinking Capability fPLLIN < fOSC 20 µA Sourcing Capability fPLLIN > fOSC 20 µA RRELPHS Controller 2-Controller 1 Phase 120 Deg Controller 3-Controller 1 Phase 240 Deg CLKOUT Controller 1 TG to CLKOUT Phase PHASMD = 0V 30 Deg PHASMD = 5V 60 Deg 3731fc 4 Document Outline Features Applications Features Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VRUN/SS = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VRUN/SS RUN/SS Pin ON Threshold VRUN/SS, Ramping Positive 1 1.5 1.9 V VRUN/SSARM RUN/SS Pin Arming Threshold VRUN/SS, Ramping Positive Until Short-Circuit 3.8 4.5 V Latch-Off is Armed VRUN/SSLO RUN/SS Pin Latch-Off Threshold VRUN/SS, Ramping Negative 3.2 V ISCL RUN/SS Discharge Current Soft-Short Condition VEAIN = 0.375V, VRUN/SS = 4.5V –5 –1.5 µA ISDLHO Shutdown Latch Disable Current VEAIN = 0.375V, VRUN/SS = 4.5V 1.5 5 µA ISENSE SENSE Pins Source Current SENSE1+, SENSE1–, SENSE2+, SENSE2–, SENSE3+, 13 20 µA SENSE3– All Equal 1.2V; Current at Each Pin DFMAX Maximum Duty Factor In Dropout, VSENSEMAX ≤ 30mV 95 98.5 % TG tR,tF Top Gate Rise Time CLOAD = 3300pF 30 90 ns Top Gate Fall Time CLOAD = 3300pF 40 90 ns BG tR, tF Bottom Gate Rise Time CLOAD = 3300pF 30 90 ns Bottom Gate Fall Time CLOAD = 3300pF 20 90 ns TG/BG t1D Top Gate Off to Bottom Gate On Delay All Controllers, CLOAD = 3300pF Each Driver 50 ns Synchronous Switch-On Delay Time BG/TG t2D Bottom Gate Off to Top Gate On Delay All Controllers, CLOAD = 3300pF Each Driver 60 ns Top Switch-On Delay Time tON(MIN) Minimum On-Time Tested with a Square Wave (Note 5) 110 ns
Power Good Output Indication
VPGL PGOOD Voltage Output Low IPGOOD = 2mA, G Package 0.1 0.3 V IPGOOD = 1.6mA, UH Package 0.5 1.0 V IPGOOD PGOOD Output Leakage VPGOOD = 5V, G Package 1 µA IPGOOD PGOOD/PHASMD Bias I 0 ≤ VPHASMD/PG ≤ VCC, UH Package –10 ±3 10 µA PGOOD Trip Thresholds VDIFFOUT with Respect to Set Output Voltage, VPGTHNEG VDIFFOUT Ramping Negative HGOOD Goes Low After VUVDLY Delay –7 –10 –13 % VPGTHPOS VDIFFOUT Ramping Positive 7 10 13 % VPGDLY Power Good Fault Report Delay After VEAIN is Forced Outside the PGOOD Thresholds 100 150 µs
Oscillator and Phase-Locked Loop
fNOM Nominal Frequency VPLLFLTR = 1.2V 360 400 440 kHz fLOW Lowest Frequency VPLLFLTR = 0V 190 225 260 kHz fHIGH Highest Frequency VPLLFLTR = 2.4V 600 680 750 kHz VPLLTH PLLIN Input Threshold Minimum Pulse Width > 100ns 1 V RPLLIN PLLIN Input Resistance 50 kΩ IPLLFLTR Phase Detector Output Current Sinking Capability fPLLIN < fOSC 20 µA Sourcing Capability fPLLIN > fOSC 20 µA RRELPHS Controller 2-Controller 1 Phase 120 Deg Controller 3-Controller 1 Phase 240 Deg CLKOUT Controller 1 TG to CLKOUT Phase PHASMD = 0V 30 Deg PHASMD = 5V 60 Deg 3731fc 4 Document Outline Features Applications Features Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts