Datasheet LTC3709 (Analog Devices) - 4

LTC3709
ELECTRICAL CHARACTERISTICS The
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denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. VCC = DRVCC = 5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Phase-Lock Loop
IINTPLL_SOURCE Internal PLL Sourcing Current 20 µA IINTPLL_SINK Internal PLL Sinking Current – 20 µA IEXTPLL_SOURCE External PLL Sourcing Current 20 µA IEXTPLL_SINK External PLL Sinking Current – 20 µA VFCB(DC) Forced Continuous Threshold Measured with a DC Voltage at FCB Pin 1.9 2.1 2.3 V VFCB(AC) Clock Input Threshold Measured with a AC Pulse at FCB Pin 1 1.5 2 V tON(PLL)1 tON1 Modulation Range by External PLL Up Modulation ION1 = 180µA, VEXTPLL = 1.8V 186 233 ns Down Modulation ION1 = 180µA, VEXTPLL = 0.6V 58 80 ns tON(PLL)2 tON2 Modulation Range by Internal PLL Up Modulation ION2 = 180µA, VINTPLL = 1.8V 186 233 ns Down Modulation ION2 = 180µA, VINTPLL = 0.6V 58 80 ns Differential Amplifier AV Differential Gain 0.995 1.000 1.005 V/V VOS Input Offset Voltage IN+ = IN– = 1.2V, IOUT = 1mA, 0.5 7 mV Input Referred; Gain = 1 CM Common Mode Input Voltage Range IOUT = 1mA 0 5 V CMRR Common Mode Rejection Ratio 0V < IN+ = IN– < 5V, IOUT = 1mA, 45 70 dB Input Referred ICL Output Current 10 40 mA GBP Gain Bandwidth Product IOUT = 1mA 2 MHz SR Slew Rate RL = 2k 5 V/µs VO(MAX) Maximum High Output Voltage IOUT = 1mA VCC – 1.2 VCC – 0.8 V RIN Input Resistance Measured at IN+ Pin 80 kΩ
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 3:
The LTC3709 is tested in a feedback loop that adjusts VFB to cause permanent damage to the device. Exposure to any Absolute Maximum achieve a specified error amplifier output voltage (ITH). Rating condition for extended periods may affect device reliability and
Note 4:
The LTC3709E is guaranteed to meet performance specifications lifetime. from 0°C to 70°C. Specifications over the –40°C to 85°C operating
Note 2:
TJ is calculated from the ambient temperature TA and power temperature range are assured by design, characterization and correlation dissipation PD as follows: with statistical process controls. LTC3709EUH: TJ = TA + (PD • 34°C/W)
Note 5:
RDS(ON) limit is guaranteed by design and/or correlation to static LTC3709EG: T test. J = TA + (PD • 95°C/W) 3709fb 4