Datasheet LTC3121 (Analog Devices) - 7

LTC3121
pin FuncTions SW (Pin 1):
Switch Pin. Connect an inductor from this
VCC (Pin 5):
VCC Regulator Output. Connect a low-ESR pin to VIN. Keep PCB trace lengths as short and wide as filter capacitor of at least 4.7µF from this pin to GND to possible to reduce EMI and voltage overshoot. When VOUT provide an internal regulated rail approximately equal to ≥ VIN + 2V, an internal anti-ringing resistor is connected the lower of VIN and 4.25V. When VOUT is higher than VIN, between SW and VIN after the inductor current has dropped and VIN falls below 3V, VCC will regulate to the lower of to near zero, to minimize EMI. The anti-ringing resistor is approximately VOUT and 4.25V. A UVLO event occurs if VCC also activated in shutdown and during the sleep periods drops below 1.6V. Switching is inhibited, and a soft-start of Burst Mode operation. is initiated when VCC returns above 1.7V.
PGND (Pin 2, Exposed Pad Pin 13):
Power Ground. When
RT (Pin 6):
Frequency Adjust Pin. Connect an external laying out your PCB, provide a short, direct path between resistor (RT) from this pin to SGND to program the oscil- PGND and the output capacitor and tie directly to the ground lator frequency according to the formula: plane. The exposed pad is ground and
must be
soldered R to the PCB ground plane for rated thermal performance. T = 57.6/ƒOSC where ƒ
V
OSC is in MHz and RT is in kΩ.
IN (Pin 3):
Input Supply Pin. The device is powered from V
VC (Pin 7):
Error Amplifier Output. A frequency compen- IN unless VOUT exceeds VIN and VIN is less than 3V. Place a low ESR ceramic bypass capacitor of at least 4.7µF from sation network is connected to this pin to compensate V the control loop. See Compensating the Feedback Loop IN to PGND. X5R and X7R dielectrics are preferred for their superior voltage and temperature characteristics. section for guidelines.
PWM/SYNC (Pin 4):
Burst Mode Operation Select and
FB (Pin 8):
Feedback Input to the Error Amplifier. Connect Oscillator Synchronization.
Do not leave this pin floating.
the resistor divider tap to this pin. Connect the top of the divider to VOUT and the bottom of the divider to SGND. • PWM/SYNC = High. Disable Burst Mode Operation and The output voltage can be adjusted from 2.2V to 15V ac- maintain low noise, constant frequency operation. cording to this formula: • PWM/SYNC = Low. The converter operates in Burst VOUT = 1.202V • (1 + R1/R2) Mode operation, independent of load current.
SD (Pin 9):
Logic Controlled Shutdown Input. Bringing this • PWM/SYNC = External CLK. The internal oscillator is pin above 1.6V enables normal, free-running operation, synchronized to the external CLK signal. Burst Mode forcing this pin below 0.25V shuts the LTC3121 down, with operation is disabled. A clock pulse width between quiescent current below 1μA.
Do not leave this pin floating.
100ns and 2µs is required to synchronize the oscillator.
SGND (Pin 10):
Signal Ground. When laying out a PC An external resistor
must be
connected between RT board, provide a short, direct path between SGND and and GND to program the oscillator slightly below the the (–) side of the output capacitor. desired synchronization frequency.
V
In non-synchronized applications, repeated clocking of
OUT (Pin 11):
Output Voltage Sense and the Source of the Internal Synchronous Rectifier MOSFET. Driver bias the PWM/SYNC pin to affect an operating mode change is derived from V is supported with these restrictions: OUT. Connect the output filter capacitor from VOUT to PGND, as close to the IC as possible. A • Boost Mode (VOUT > VIN): IOUT <500µA: ƒPWM/SYNC ≤ minimum value of 10µF ceramic is recommended. VOUT 100Hz, IOUT ≥ 500µA: ƒPWM/SYNC ≤ 5kHz is disconnected from VIN when SD is low. • Buck Mode (VOUT < VIN): IOUT <5mA: ƒPWM/SYNC ≤ 5Hz,
CAP (Pin 12):
Serves as the Low Reference for the Syn- IOUT ≥ 5mA: ƒPWM/SYNC ≤ 5kHz chronous Rectifier Gate Drive. Connect a low ESR filter capacitor (typically 100nF) from this pin to VOUT to provide an elevated ground rail, approximately 5.6V below VOUT, used to drive the synchronous rectifier. 3121fa For more information www.linear.com/LTC3121 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Package Description Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Low Voltage Operation Low Noise Fixed Frequency Operation Burst Mode Operation Applications Information PCB Layout Guidelines Schottky Diode Component Selection Operating Frequency Selection Typical Applications Package Description Revision History Typical Application Related Parts