Datasheet LTC1773 (Analog Devices) - 6

LTC1773
U OPERATIO (Refer to Functional Diagram) Main Control Loop
secondary winding regulation as described in Auxiliary Winding Control Using SYNC/FCB Pin in the Applications The LTC1773 uses a constant frequency, current mode Information section. step- down architecture to drive an external pair of comple- mentary power MOSFETs. During normal operation, the When the converter operates in Burst Mode operation the external top P-channel power MOSFET turns on each cycle peak current of the inductor is set to approximately a third when the oscillator sets the RS latch, and turns off when of the maximum peak current value during normal opera- the current comparator ICOMP resets the RS latch. The tion even though the voltage at the ITH pin indicates a lower peak inductor current at which ICOMP resets the RS latch value. The voltage at the ITH pin drops when the inductor’s is controlled by the voltage on the ITH pin, which is the average current is greater than the load requirement. As output of error amplifier EA. The VFB pin, described in the the ITH voltage drops below 0.22V, the BURST compara- Pin Functions section, allows EA to receive an output tor trips, causing the internal sleep line to go high and turn feedback voltage from an external resistive divider. When off both power MOSFETs. the load current increases, it causes a slight decrease in The circuit enters sleep mode with both power MOSFETs the feedback voltage relative to the 0.8V reference, which turned off. In sleep mode, the internal circuitry is partially in turn causes the ITH voltage to increase until the average turned off, reducing the quiescent current to about 80µA. inductor current matches the new load current. While the The load current is now being supplied from the output top P-channel MOSFET is off, the bottom N-channel capacitor. When the output voltage drops, causing I MOSFET is turned on until either the inductor current TH to rise above 0.27V, the internal sleep line goes low, and the starts to reverse, as indicated by the current reversal LTC1773 resumes normal operation. The next oscillator comparator IRCMP, or the beginning of the next cycle. cycle will turn on the external top MOSFET and the switch- The main control loop is shut down by pulling the RUN/SS ing cycle repeats. pin low. Releasing RUN/SS allows an internal 1.5µA current source to charge the external soft-start capacitor
Short-Circuit Protection
CSS. When CSS reaches 0.7V, the main control loop is When the output is shorted to ground, the frequency of the enabled with the internal buffered ITH voltage clamped at oscillator is reduced to about 55kHz, 1/10 the nominal approximately 5% of its maximum value. As CSS contin- frequency. This frequency foldback ensures that the in- ues to charge, the internal buffered ITH is gradually re- ductor current has more time to decay, thereby preventing leased allowing normal operation to resume. runaway. The oscillator’s frequency will gradually in- An overvoltage comparator, 0V, guards against transient crease to 550kHz after VFB rises above 0.4V. overshoots (>7.5%) as well as other more serious condi- tions that may overvoltage the output. In this case, the top
Frequency Synchronization
MOSFET is turned off and the bottom MOSFET is turned on The LTC1773 can be synchronized with an external TTL/ until the overvoltage condition is cleared. CMOS compatible clock signal. The frequency range of this signal must be from 585kHz to 750kHz. Do not
Burst Mode Operation
synchronize the LTC1773 below 585kHz as this may cause The LTC1773 is capable of Burst Mode operation in which abnormal operation and an undesired frequency spec- the external power MOSFETs operate intermittently based trum. The top MOSFET turn-on follows the rising edge of on load demand. To enable Burst Mode operation, simply the external source. allow the SYNC/FCB pin to float or connect it to a logic When the LTC1773 is clocked by an external source, Burst high. To disable Burst Mode operation and force continu- Mode operation is disabled; the LTC1773 then operates in ous mode, connect the SYNC/FCB pin to GND. The thresh- PWM pulse skipping mode preventing current reversal. In old voltage between Burst Mode operation and forced this mode, when the output load is very low, current continuous mode is 0.8V. This can be used to assist in comparator ICOMP remains tripped for more than one cycle 1773fb 6