Datasheet LTC1772B (Analog Devices) - 6

LTC1772B
OPERATION (Refer to Functional Diagram) Main Control Loop Low Load Current Operation
The LTC1772B is a constant frequency current mode Under very light load current conditions, the ITH/RUN pin switching regulator. During normal operation, the external voltage will be very close to the zero current level of 0.85V. P-channel power MOSFET is turned on each cycle when As the load current decreases further, an internal offset at the oscillator sets the RS latch (RS1) and turned off when the current comparator input will assure that the current the current comparator (ICMP) resets the latch. The peak comparator remains tripped (even at zero load current) and inductor current at which ICMP resets the RS latch is the regulator will start to skip cycles, as it must, in order controlled by the voltage on the ITH/RUN pin, which is the to maintain regulation. This behavior allows the regulator output of the error amplifi er EAMP. An external resistive to maintain constant frequency down to very light loads, divider connected between VOUT and ground allows the resulting in less low frequency noise generation over a EAMP to receive an output feedback voltage VFB. When wide load current range. the load current increases, it causes a slight decrease in Figure 2 illustrates this result for the circuit of Figure 1 VFB relative to the 0.8V reference, which in turn causes the using both an LTC1772 in Burst Mode operation and an ITH/RUN voltage to increase until the average inductor LTC1772B (non-Burst Mode operation). At an output cur- current matches the new load current. rent of 100mA, the Burst Mode operation part exhibits The main control loop is shut down by pulling the ITH/RUN an output ripple of approximately 60mVP-P, whereas the pin low. Releasing ITH/RUN allows an internal 0.5μA current non-Burst Mode operation part has an output ripple of only source to charge up the external compensation network. 20mVP-P. At lower output current levels, the improvement When the ITH/RUN pin reaches 0.35V, the main control is even greater. This comes at a tradeoff of lower effi ciency loop is enabled with the ITH/RUN voltage then pulled up for the non-Burst Mode operation part (see Figure 1). Also to its zero current level of approximately 0.85V. As the notice the constant frequency operation of the LTC1772B, external compensation network continues to charge up, even at 5% of maximum output current. the corresponding output current trip level follows, allow- ing normal operation.
Dropout Operation
Comparator OVP guards against transient overshoots When the input supply voltage decreases towards the > 7.5% by turning off the external P-channel power output voltage, the rate of change of inductor current MOSFET and keeping it off until the fault is removed. during the ON cycle decreases. This reduction means
VOUT Ripple for Figure 1 Circuit Using VOUT Ripple for Figure 1 Circuit Using LTC1772 Burst Mode Operation. LTC1772B Non-Burst Mode Operation.
20mVAC/DIV 20mVAC/DIV 1772 F02a 1772 F02b VIN = 3.6V 5μs/DIV VIN = 3.6V 5μs/DIV VOUT = 2.5V VOUT = 2.5V IOUT = 100mA IOUT = 100mA
Figure 2. Output Ripple Waveforms for the Circuit of Figure 1.
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