Datasheet LTC1735-1 (Analog Devices) - 10

LTC1735-1
U OPERATIO (Refer to Functional Diagram) POWER GOOD
over the widest possible output current range. This con- stant frequency operation is not quite as efficient as Burst A window comparator monitors the output voltage and its Mode operation, but does provide a lower noise, constant open-drain output is pulled low when the divided down frequency operation. When the power good window com- output voltage (appearing at the VOSENSE pin) is not within ± parator indicates the output is not in regulation, the 7.5% of the reference voltage of 0.8V. PGOOD pin is pulled to ground and synchronization is During a programmed output voltage transition (i.e., a inhibited. Obviously when driving the PGOOD pin with an transition from 1.55V to 1.3V) the PGOOD open-drain external clock the power good indication is not available output will be pulled low and Burst Mode operation will be unless additional circuitry is added. disabled until the output voltage is within 7.5% of its newly If the PGOOD pin is tied to ground, continuous operation programmed value. is forced. This operation is the least efficient mode, but is When the PGOOD pin is driven by an external oscillator desirable in certain applications. The output can source through a series resistor, cycle-skipping operation is or sink current in this mode. When forcing continuous invoked and the internal oscillator is synchronized to the operation and sinking current, current will be forced back external clock by comparator C. In this mode, the 25% into the main power supply potentially boosting the input minimum inductor current clamp is removed, providing supply to dangerous voltage levels—BEWARE. low noise, constant frequency discontinuous operation
U U W U APPLICATIO S I FOR ATIO
The basic LTC1735-1 application circuit is shown in Allowing a margin for variations in the LTC1735-1 and Figure 1 on the first page of this data sheet. External external component values yields: component selection is driven by the load requirement and begins with the selection of R mV SENSE. Once RSENSE R = 50 is known, C SENSE OSC and L can be chosen. Next, the power IMAX MOSFETs and D1 are selected. The operating frequency and the inductor are chosen based largely on the desired
COSC Selection for Operating Frequency
amount of ripple current. Finally, CIN is selected for its
and Synchronization
ability to handle the large RMS current into the converter The choice of operating frequency and inductor value is and COUT is chosen with low enough ESR to meet the a trade-off between efficiency and component size. Low output voltage ripple and transient specifications. The frequency operation improves efficiency by reducing circuit shown in Figure 1 can be configured for operation MOSFET switching losses, both gate charge loss and up to an input voltage of 28V (limited by the external transition loss. However, lower frequency operation MOSFETs). requires more inductance for a given amount of ripple
R
current.
SENSE Selection For Output Current
R The LTC1735-1 uses a constant frequency architecture SENSE is chosen based on the required output current. The LTC1735-1 current comparator has a maximum with the frequency determined by an external oscillator threshold of 75mV/R capacitor C SENSE and an input common mode OSC. Each time the topside MOSFET turns on, range of SGND to 1.1(INTV the voltage on C CC). The current comparator OSC is reset to ground. During the on-time, threshold sets the peak of the inductor current, yielding a COSC is charged by a fixed current. When the voltage on the maximum average output current I capacitor reaches 1.19V, C MAX equal to the peak OSC is reset to ground. The value less half the peak-to-peak ripple current, ∆I process then repeats. L. 10