Datasheet LT3495, LT3495B, LT3495-1, LT3495B-1 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | 650mA Micropower Low Noise Boost Converter with Output Disconnect |
| Seiten / Seite | 16 / 7 — PIN FUNCTIONS. GND (Pins 1, 2):. VCC (Pin 3):. VOUT (Pin 7):. CTRL (Pin … |
| Dateiformat / Größe | PDF / 647 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. GND (Pins 1, 2):. VCC (Pin 3):. VOUT (Pin 7):. CTRL (Pin 4):. CAP (Pins 8, 9):. SHDN (Pin 5):. SW (Pin 10):. FB (Pin 6):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LT3495/LT3495B/ LT3495-1/LT3495B-1
PIN FUNCTIONS GND (Pins 1, 2):
Ground. Tie directly to local ground achieve the desired output voltage, choose R1 according plane. to the following formula:
VCC (Pin 3):
Input Supply Pin. Must be locally by- R1 = 76 • (VOUT/1.235 – 1)kΩ passed.
VOUT (Pin 7):
Drain of Output Disconnect PMOS. Place a
CTRL (Pin 4):
Dimming Pin. If not used, tie CTRL to 1.5V bypass capacitor from this pin to GND. See Applications or higher. If in use, drive CTRL below 1.235V to override information. the internal reference. See Applications section for more
CAP (Pins 8, 9):
Source of Output Disconnect PMOS. information. Place a bypass capacitor from this pin to GND.
SHDN (Pin 5):
Shutdown Pin. Tie to 1.5V or more to en-
SW (Pin 10):
Switch Pin. This is the collector of the in- able chip. Ground to shut down. ternal NPN power switch. Minimize the metal trace area
FB (Pin 6):
Feedback Pin. Minimize the metal trace area connected to this pin to minimize EMI. to this pin to minimize noise. Reference voltage is 1.235V.
Exposed Pad (Pin 11):
Ground. This pin must be soldered There is an internal 76k resistor from the FB pin to GND. To to PCB.
BLOCK DIAGRAM
INPUT R1 6 3 10 9 8 7 FB VCC SW CAP CAP VOUT 76k START-UP CONTROL – DISCONNECT CTRL + CONTROL SWITCH CONTROL 4 + + SHDN 5 VREF SHUNT CONTROL GND GND 2 1 11 3495 BD 3495b1b1fa 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Infomation Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
PIN FUNCTIONS GND (Pins 1, 2):
Ground. Tie directly to local ground achieve the desired output voltage, choose R1 according plane. to the following formula:
VCC (Pin 3):
Input Supply Pin. Must be locally by- R1 = 76 • (VOUT/1.235 – 1)kΩ passed.
VOUT (Pin 7):
Drain of Output Disconnect PMOS. Place a
CTRL (Pin 4):
Dimming Pin. If not used, tie CTRL to 1.5V bypass capacitor from this pin to GND. See Applications or higher. If in use, drive CTRL below 1.235V to override information. the internal reference. See Applications section for more
CAP (Pins 8, 9):
Source of Output Disconnect PMOS. information. Place a bypass capacitor from this pin to GND.
SHDN (Pin 5):
Shutdown Pin. Tie to 1.5V or more to en-
SW (Pin 10):
Switch Pin. This is the collector of the in- able chip. Ground to shut down. ternal NPN power switch. Minimize the metal trace area
FB (Pin 6):
Feedback Pin. Minimize the metal trace area connected to this pin to minimize EMI. to this pin to minimize noise. Reference voltage is 1.235V.
Exposed Pad (Pin 11):
Ground. This pin must be soldered There is an internal 76k resistor from the FB pin to GND. To to PCB.
BLOCK DIAGRAM
INPUT R1 6 3 10 9 8 7 FB VCC SW CAP CAP VOUT 76k START-UP CONTROL – DISCONNECT CTRL + CONTROL SWITCH CONTROL 4 + + SHDN 5 VREF SHUNT CONTROL GND GND 2 1 11 3495 BD 3495b1b1fa 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Infomation Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts