Datasheet LT3494, LT3494A (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | Micropower Low Noise Boost Converters with Output Disconnect |
| Seiten / Seite | 12 / 6 — PIN FUNCTIONS. SW (Pin 1):. FB (Pin 6):. GND (Pin 2):. CC (Pin 3):. CTRL … |
| Dateiformat / Größe | PDF / 273 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. SW (Pin 1):. FB (Pin 6):. GND (Pin 2):. CC (Pin 3):. CTRL (Pin 4):. OUT (Pin 7):. CAP (Pin 8):. SHDN (Pin 5):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LT3494/LT3494A
PIN FUNCTIONS SW (Pin 1):
Switch Pin. This is the collector of the internal
FB (Pin 6):
Feedback Pin. Reference voltage is 1.225V. NPN power switch. Minimize the metal trace area connected There is an internal 182k resistor from the FB pin to GND. to this pin to minimize EMI. To achieve the desired output voltage, choose R1 accord- ing to the following formula:
GND (Pin 2):
Ground. Tie directly to local ground plane.
V
⎛ V ( ) ⎞
CC (Pin 3):
Input Supply Pin. Must be locally OUT MAX R1= 182 • – 1 kΩ bypassed. 1 225 ⎝⎜ . ⎠⎟
CTRL (Pin 4):
Dimming Pin. If not used, tie CTRL to 1.5V
V
or higher. If in use, drive CTRL below 1.225V to override
OUT (Pin 7):
Drain of Output Disconnect PMOS. Place a bypass capacitor from this pin to GND. See Applications the internal reference. See Applications Information for Information. more information.
CAP (Pin 8):
This is the cathode of the internal Schottky
SHDN (Pin 5):
Shutdown Pin. Tie to 1.5V or more to diode. Place a bypass capacitor from this pin to GND. enable device. Ground to shut down.
Exposed Pad (Pin 9):
Ground. This pin must be soldered to PCB.
BLOCK DIAGRAM
).054 /54054 6## 37 #!0 6/54 2 34!24 50 &" n K $)3#/..%#4 #42, #/.42/, 37)4#( 3($. 62%& 3(5.4 '.$ 3494fb 6
PIN FUNCTIONS SW (Pin 1):
Switch Pin. This is the collector of the internal
FB (Pin 6):
Feedback Pin. Reference voltage is 1.225V. NPN power switch. Minimize the metal trace area connected There is an internal 182k resistor from the FB pin to GND. to this pin to minimize EMI. To achieve the desired output voltage, choose R1 accord- ing to the following formula:
GND (Pin 2):
Ground. Tie directly to local ground plane.
V
⎛ V ( ) ⎞
CC (Pin 3):
Input Supply Pin. Must be locally OUT MAX R1= 182 • – 1 kΩ bypassed. 1 225 ⎝⎜ . ⎠⎟
CTRL (Pin 4):
Dimming Pin. If not used, tie CTRL to 1.5V
V
or higher. If in use, drive CTRL below 1.225V to override
OUT (Pin 7):
Drain of Output Disconnect PMOS. Place a bypass capacitor from this pin to GND. See Applications the internal reference. See Applications Information for Information. more information.
CAP (Pin 8):
This is the cathode of the internal Schottky
SHDN (Pin 5):
Shutdown Pin. Tie to 1.5V or more to diode. Place a bypass capacitor from this pin to GND. enable device. Ground to shut down.
Exposed Pad (Pin 9):
Ground. This pin must be soldered to PCB.
BLOCK DIAGRAM
).054 /54054 6## 37 #!0 6/54 2 34!24 50 &" n K $)3#/..%#4 #42, #/.42/, 37)4#( 3($. 62%& 3(5.4 '.$ 3494fb 6