Datasheet LT3472 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | Boost and Inverting DC/DC Converter for CCD Bias |
| Seiten / Seite | 12 / 5 — PI FU CTIO S. SWP (Pin 1):. SSN (Pin 7):. VIN (Pin 2):. FBP (Pin 8):. … |
| Dateiformat / Größe | PDF / 233 Kb |
| Dokumentensprache | Englisch |
PI FU CTIO S. SWP (Pin 1):. SSN (Pin 7):. VIN (Pin 2):. FBP (Pin 8):. SHDN (Pin 3):. SWN (Pin 4):. SSP (Pin 9):. DN (Pin 5):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LT3472
U U U PI FU CTIO S SWP (Pin 1):
Switch Pin for Positive (Boost) Channel.
SSN (Pin 7):
Soft Start-Up Pin for Inverter. Connect a cap Connect boost inductor here. here for soft start-up. Leave open for quick start-up. This pin is connected to 1.25V with a 50k resistor internally.
VIN (Pin 2):
Input Supply Pin. Must be locally bypassed with a X5R or X7R type ceramic capacitor.
FBP (Pin 8):
Feedback Pin for Boost. Connect boost feedback resistor R1 from this Pin to V
SHDN (Pin 3):
Shutdown Pin. Connect to 0.8V or higher to O1. Choose R1 according to V enable device, 0.3V or less to disable device. O1 = 1.25 • (1 + R1/50k). Pin voltage = 1.25V when regulated.
SWN (Pin 4):
Switch Pin for Negative (Inverter) Channel.
SSP (Pin 9):
Soft Start-Up Pin for Boost. Connect a cap Connect inverter input inductor and flying capacitor here. here for soft start-up. Leave open for quick start-up. This
DN (Pin 5):
Anode of Internal Schottky for Inverter. pin is connected to 1.25V with a 50k resistor internally. Connect inverter output inductor and flying capacitor
V
here.
POS (Pin 10):
Output Pin for Boost. Connect boost output capacitor here.
FBN (Pin 6):
Feedback Pin for Inverter. Connect feedback
GND (Exposed Pad) (Pin 11):
GND Pin. Tie directly to resistor R2 from this pin to VO2. Choose R2 according to ground plane through multiple vias under the package for VO2 = 1.25 • R2/50k. Pin voltage = 0V when regulated. optimum thermal performance.
W BLOCK DIAGRA
SWP 1 COMPARATOR DP FBP 8 – 10 V A1 – X1 DRIVER 1 POS 50k + A2 R Q Q1 S + – VIN 2 ∑ + VREF RAMP 1.25V 11 GND GENERATOR 50k 1.2MHz 3 SHDN OSCILLATOR COMPARATOR FBN 6 + DRIVER 2 A3 – X2 4 SWN S – A4 R Q Q2 + SSN 7 – 50k ∑ 1.25V + DN 50k RAMP 5 DN GENERATOR SSP 9 3472 BD
Figure 1. LT3472 Block Diagram
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U U U PI FU CTIO S SWP (Pin 1):
Switch Pin for Positive (Boost) Channel.
SSN (Pin 7):
Soft Start-Up Pin for Inverter. Connect a cap Connect boost inductor here. here for soft start-up. Leave open for quick start-up. This pin is connected to 1.25V with a 50k resistor internally.
VIN (Pin 2):
Input Supply Pin. Must be locally bypassed with a X5R or X7R type ceramic capacitor.
FBP (Pin 8):
Feedback Pin for Boost. Connect boost feedback resistor R1 from this Pin to V
SHDN (Pin 3):
Shutdown Pin. Connect to 0.8V or higher to O1. Choose R1 according to V enable device, 0.3V or less to disable device. O1 = 1.25 • (1 + R1/50k). Pin voltage = 1.25V when regulated.
SWN (Pin 4):
Switch Pin for Negative (Inverter) Channel.
SSP (Pin 9):
Soft Start-Up Pin for Boost. Connect a cap Connect inverter input inductor and flying capacitor here. here for soft start-up. Leave open for quick start-up. This
DN (Pin 5):
Anode of Internal Schottky for Inverter. pin is connected to 1.25V with a 50k resistor internally. Connect inverter output inductor and flying capacitor
V
here.
POS (Pin 10):
Output Pin for Boost. Connect boost output capacitor here.
FBN (Pin 6):
Feedback Pin for Inverter. Connect feedback
GND (Exposed Pad) (Pin 11):
GND Pin. Tie directly to resistor R2 from this pin to VO2. Choose R2 according to ground plane through multiple vias under the package for VO2 = 1.25 • R2/50k. Pin voltage = 0V when regulated. optimum thermal performance.
W BLOCK DIAGRA
SWP 1 COMPARATOR DP FBP 8 – 10 V A1 – X1 DRIVER 1 POS 50k + A2 R Q Q1 S + – VIN 2 ∑ + VREF RAMP 1.25V 11 GND GENERATOR 50k 1.2MHz 3 SHDN OSCILLATOR COMPARATOR FBN 6 + DRIVER 2 A3 – X2 4 SWN S – A4 R Q Q2 + SSN 7 – 50k ∑ 1.25V + DN 50k RAMP 5 DN GENERATOR SSP 9 3472 BD
Figure 1. LT3472 Block Diagram
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