Datasheet LTC3026-1 (Analog Devices) - 6

LTC3026-1
PIN FUNCTIONS IN (Pins 1, 2):
Input Supply Voltage. Output load current be left floating and must be tied to a valid logic level (such is supplied directly from IN. The IN pin should be locally as IN) if not used. bypassed to ground if the LTC3026-1 is more than a few
PG (Pin 7):
Power Good Pin. When PG is high impedance inches away from another source of bulk capacitance. OUT is in regulation, and low impedance when OUT is in In general, the output impedance of a battery rises with shutdown or out of regulation. frequency, so it is usually advisable to include an input bypass capacitor when supplying IN from a battery. A
ADJ (Pin 8):
Output Adjust Pin. This is the input to the error capacitor in the range of 0.1μF to 4.7μF is usually sufficient. amplifier. It has a typical bias current of 0.1nA flowing into the pin. The ADJ pin reference voltage is 0.4V referenced
GND (Pin 3, Exposed Pad Pin 11):
Ground and Heat Sink. to ground. The output voltage range is 0.4V to 2.6V and is Connect the exposed pad to the PCB ground plane or large typically set by connecting ADJ to a resistor divider from pad for optimum thermal performance. OUT to GND. See Figure 3.
GNDS (Pin 4):
Ground Sense Pin. Tie directly to Pin 3
OUT (Pins 9, 10):
Regulated Output Voltage. The OUT pins GND external to the part. supply power to the load. A minimum output capacitance
BIAS (Pin 5):
BIAS Voltage Pin. Must be connected to an of 5μF is required to ensure stability. Larger output capaci- external 5V supply. A 1μF low ESR ceramic capacitor is tors may be required for applications with large transient recommended for bypassing the BIAS pin. loads to limit peak voltage transients. See the Applica-
SHDN
tions Information section for more information on output
(Pin 6):
Shutdown Input Pin, Active Low. This pin is capacitance. used to put the LTC3026-1 into shutdown. The SHDN pin current is typically less than 10nA. The SHDN pin cannot 30261f 6