Datasheet LTC3026 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | 1.5A Low Input Voltage VLDO Linear Regulator |
| Seiten / Seite | 18 / 10 — operaTion. Figure 2. Soft-Start with Boost Disable. Adjustable Output … |
| Dateiformat / Größe | PDF / 266 Kb |
| Dokumentensprache | Englisch |
operaTion. Figure 2. Soft-Start with Boost Disable. Adjustable Output Voltage. Figure 1. Output Load Step Response
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LTC3026
operaTion
The LDO provides a high accuracy output capable of HI supplying 1.5A of output current with a typical dropout SHDN LO voltage of only 100mV. A single ceramic capacitor as 1.5V small as 10µF is all that is required for output bypassing. A low reference voltage allows the LTC3026 output to be OUT programmed to much lower voltages than available in common LDOs (range of 0.4V to 2.6V). 0V The devices also include current limit and thermal overload 1.5V protection, and will survive an output short-circuit indefi- PG nitely. The fast transient response of the follower output 0V TA = 25°C 100µs/DIV 3026 F02 stage overcomes the traditional trade-off between dropout ROUT = 1Ω voltage, quiescent current and load transient response VIN = 1.7V VB = 5V inherent in most LDO regulator architectures, see Figure 1.
Figure 2. Soft-Start with Boost Disable
1.5A IOUT
Adjustable Output Voltage
0mA The output voltage is set by the ratio of two external resis- tors as shown in Figure 3. The device servos the output OUT AC 20mV/DIV to maintain the ADJ pin voltage at 0.4V (referenced to ground). Thus, the current in R1 is equal to 0.4V/R1. For good transient response, stability and accuracy the current in R1 should be at least 80µA, thus, the value of R1 should be no greater than 5k. The current in R2 is the current in R1 plus the ADJ pin bias current. Since the ADJ pin bias V 3026 F01 OUT = 1.5V 100µs/DIV C current is typically <10nA it can be ignored in the output OUT = 10µF VIN = 1.7V voltage calculation. The output voltage can be calculated VB = 5V using the formula in Figure 3. Note that in shutdown the
Figure 1. Output Load Step Response
output is turned off and the divider current will be zero once COUT is discharged. The LTC3026 also includes a soft-start feature to prevent excessive current flow at VIN during start-up. When the R2 V LDO is enabled, the soft-start circuitry gradually increases OUT VOUT = 0.4V 1+ R1 LTC3026 R2 the LDO reference voltage from 0V to 0.4V over a period ADJ COUT of approximately 200µs, see Figure 2. R1 GND 3026 F03
Figure 3. Programming the LTC3026
3026ff 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts
operaTion
The LDO provides a high accuracy output capable of HI supplying 1.5A of output current with a typical dropout SHDN LO voltage of only 100mV. A single ceramic capacitor as 1.5V small as 10µF is all that is required for output bypassing. A low reference voltage allows the LTC3026 output to be OUT programmed to much lower voltages than available in common LDOs (range of 0.4V to 2.6V). 0V The devices also include current limit and thermal overload 1.5V protection, and will survive an output short-circuit indefi- PG nitely. The fast transient response of the follower output 0V TA = 25°C 100µs/DIV 3026 F02 stage overcomes the traditional trade-off between dropout ROUT = 1Ω voltage, quiescent current and load transient response VIN = 1.7V VB = 5V inherent in most LDO regulator architectures, see Figure 1.
Figure 2. Soft-Start with Boost Disable
1.5A IOUT
Adjustable Output Voltage
0mA The output voltage is set by the ratio of two external resis- tors as shown in Figure 3. The device servos the output OUT AC 20mV/DIV to maintain the ADJ pin voltage at 0.4V (referenced to ground). Thus, the current in R1 is equal to 0.4V/R1. For good transient response, stability and accuracy the current in R1 should be at least 80µA, thus, the value of R1 should be no greater than 5k. The current in R2 is the current in R1 plus the ADJ pin bias current. Since the ADJ pin bias V 3026 F01 OUT = 1.5V 100µs/DIV C current is typically <10nA it can be ignored in the output OUT = 10µF VIN = 1.7V voltage calculation. The output voltage can be calculated VB = 5V using the formula in Figure 3. Note that in shutdown the
Figure 1. Output Load Step Response
output is turned off and the divider current will be zero once COUT is discharged. The LTC3026 also includes a soft-start feature to prevent excessive current flow at VIN during start-up. When the R2 V LDO is enabled, the soft-start circuitry gradually increases OUT VOUT = 0.4V 1+ R1 LTC3026 R2 the LDO reference voltage from 0V to 0.4V over a period ADJ COUT of approximately 200µs, see Figure 2. R1 GND 3026 F03
Figure 3. Programming the LTC3026
3026ff 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts