Datasheet LT3071 (Analog Devices) - 4
| Hersteller | Analog Devices |
| Beschreibung | 5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining |
| Seiten / Seite | 30 / 4 — ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply … |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply over the full operating
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LT3071
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COUT = 15µF (Note 9), VIN = VOUT + 0.3V (Note 5), VBIAS = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS
VIZ Input Range (Logic-Z State), l 0.75 VBIAS – 0.9 V VO2, VO1, VO0 VIH Input Threshold (Logic-1 State), Input Rising l VBIAS – 0.25 V VO2, VO1, VO0 Input Hysteresis (Both Thresholds), 60 mV VO2, VO1, VO0 Input Current High, VIH = VBIAS = 2.5V, Current Flows Into Pin l 25 40 µA VO2, VO1, VO0 Input Current Low, VIL = 0V, VBIAS = 2.5V, Current Flows Out of Pin l 25 40 µA VO2, VO1, VO0 EN Pin Threshold VOUT = Off to On, VBIAS = 2.5V l 1.4 V VOUT = On to Off, VBIAS = 2.5V l 0.9 V VOUT = Off to On, VBIAS = 2.2V to 3.6V l 0.56 • VBIAS V VOUT = On to Off, VBIAS = 2.2V to 3.6V l 0.36 • VBIAS V EN Pin Logic High Current VEN = VBIAS = 2.5V l 2.5 4.0 6.5 µA EN Pin Logic Low Current VEN = 0V l 0.1 µA VBIAS Ripple Rejection VBIAS = VOUT + 1.5VAVG, VRIPPLE =0.5VP-P , fRIPPLE = 120Hz, 75 dB VIN – VOUT = 300mV, IOUT = 2.5A VIN Ripple Rejection VBIAS = 2.5V, VRIPPLE = 50mVP-P , fRIPPLE = 120Hz, 66 dB (Notes 3, 4, 5) VIN – VOUT = 300mV, IOUT = 2.5A Reference Voltage Noise CREF/BYP = 10nF, BW = 10Hz to 100kHz 10 µVRMS (REF/BYP Pin) Output Voltage Noise VOUT = 1V, IOUT = 5A, CREF/BYP = 10nF, COUT = 15µF, 25 µVRMS BW = 10Hz to 100kHz
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
The LT3071 incorporates safe operating area protection circuitry. may cause permanent damage to the device. Exposure to any Absolute Current limit decreases as the VIN-VOUT voltage increases. Current limit Maximum Rating condition for extended periods may affect device foldback starts at VIN – VOUT > 500mV. See the Typical Performance reliability and lifetime. Characteristics for a graph of Current Limit vs VIN – VOUT voltage. The
Note 2:
The LT3071 regulators are tested and specified under pulse load current limit foldback feature is independent of the thermal shutdown conditions such that T circuity. J ≅ TA. The LT3071E is 100% tested at TA = 25°C. Performance at –40°C and 125°C is assured by design, characterization
Note 6:
Dropout voltage, VDO, is the minimum input to output voltage and correlation with statistical process controls. The LT3071I is differential at a specified output current. In dropout, the output voltage guaranteed over the –40°C to 125°C operating junction temperature range. equals VIN – VDO. The LT3071MP is 100% tested and guaranteed over the –55°C to 125°C
Note 7:
GND pin current is tested with VIN = VOUT(NOMINAL) + 300mV and a operating junction temperature range. current source load. VIOC is a buffered output determined by the value of
Note 3:
To maintain proper performance and regulation, the BIAS supply VOUT as programmed by the VO2-VO0 pins. VIOC’s output is independent voltage must be higher than the IN supply voltage. For a given VOUT , the of the margining function. BIAS voltage must satisfy the following conditions: 2.2V ≤ VBIAS ≤ 3.6V
Note 8:
Reverse output current is tested with the IN pins grounded and the and VBIAS ≥ (1.25 • VOUT + 1V). For VOUT ≤ 0.95V, the minimum BIAS OUT + SENSE pins forced to the rated output voltage. This is measured as voltage is limited to 2.2V. current into the OUT + SENSE pins.
Note 4:
Operating conditions are limited by maximum junction
Note 9:
Frequency Compensation: The LT3071 must be frequency temperature. The regulated output voltage specification does not apply compensated at its OUT pins with a minimum COUT of 15µF configured for all possible combinations of input voltage and output current. When as a cluster of (15×) 1µF ceramic capacitors or as a graduated cluster operating at maximum output current, limit the input voltage range to of 10µF/4.7µF/2.2µF ceramic capacitors of the same case size. Linear VIN < VOUT + 500mV. Technology only recommends X5R or X7R dielectric capacitors. 3071fc 4 For more information www.linear.com/LT3071 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Revision History Typical Application Related Parts
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COUT = 15µF (Note 9), VIN = VOUT + 0.3V (Note 5), VBIAS = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS
VIZ Input Range (Logic-Z State), l 0.75 VBIAS – 0.9 V VO2, VO1, VO0 VIH Input Threshold (Logic-1 State), Input Rising l VBIAS – 0.25 V VO2, VO1, VO0 Input Hysteresis (Both Thresholds), 60 mV VO2, VO1, VO0 Input Current High, VIH = VBIAS = 2.5V, Current Flows Into Pin l 25 40 µA VO2, VO1, VO0 Input Current Low, VIL = 0V, VBIAS = 2.5V, Current Flows Out of Pin l 25 40 µA VO2, VO1, VO0 EN Pin Threshold VOUT = Off to On, VBIAS = 2.5V l 1.4 V VOUT = On to Off, VBIAS = 2.5V l 0.9 V VOUT = Off to On, VBIAS = 2.2V to 3.6V l 0.56 • VBIAS V VOUT = On to Off, VBIAS = 2.2V to 3.6V l 0.36 • VBIAS V EN Pin Logic High Current VEN = VBIAS = 2.5V l 2.5 4.0 6.5 µA EN Pin Logic Low Current VEN = 0V l 0.1 µA VBIAS Ripple Rejection VBIAS = VOUT + 1.5VAVG, VRIPPLE =0.5VP-P , fRIPPLE = 120Hz, 75 dB VIN – VOUT = 300mV, IOUT = 2.5A VIN Ripple Rejection VBIAS = 2.5V, VRIPPLE = 50mVP-P , fRIPPLE = 120Hz, 66 dB (Notes 3, 4, 5) VIN – VOUT = 300mV, IOUT = 2.5A Reference Voltage Noise CREF/BYP = 10nF, BW = 10Hz to 100kHz 10 µVRMS (REF/BYP Pin) Output Voltage Noise VOUT = 1V, IOUT = 5A, CREF/BYP = 10nF, COUT = 15µF, 25 µVRMS BW = 10Hz to 100kHz
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
The LT3071 incorporates safe operating area protection circuitry. may cause permanent damage to the device. Exposure to any Absolute Current limit decreases as the VIN-VOUT voltage increases. Current limit Maximum Rating condition for extended periods may affect device foldback starts at VIN – VOUT > 500mV. See the Typical Performance reliability and lifetime. Characteristics for a graph of Current Limit vs VIN – VOUT voltage. The
Note 2:
The LT3071 regulators are tested and specified under pulse load current limit foldback feature is independent of the thermal shutdown conditions such that T circuity. J ≅ TA. The LT3071E is 100% tested at TA = 25°C. Performance at –40°C and 125°C is assured by design, characterization
Note 6:
Dropout voltage, VDO, is the minimum input to output voltage and correlation with statistical process controls. The LT3071I is differential at a specified output current. In dropout, the output voltage guaranteed over the –40°C to 125°C operating junction temperature range. equals VIN – VDO. The LT3071MP is 100% tested and guaranteed over the –55°C to 125°C
Note 7:
GND pin current is tested with VIN = VOUT(NOMINAL) + 300mV and a operating junction temperature range. current source load. VIOC is a buffered output determined by the value of
Note 3:
To maintain proper performance and regulation, the BIAS supply VOUT as programmed by the VO2-VO0 pins. VIOC’s output is independent voltage must be higher than the IN supply voltage. For a given VOUT , the of the margining function. BIAS voltage must satisfy the following conditions: 2.2V ≤ VBIAS ≤ 3.6V
Note 8:
Reverse output current is tested with the IN pins grounded and the and VBIAS ≥ (1.25 • VOUT + 1V). For VOUT ≤ 0.95V, the minimum BIAS OUT + SENSE pins forced to the rated output voltage. This is measured as voltage is limited to 2.2V. current into the OUT + SENSE pins.
Note 4:
Operating conditions are limited by maximum junction
Note 9:
Frequency Compensation: The LT3071 must be frequency temperature. The regulated output voltage specification does not apply compensated at its OUT pins with a minimum COUT of 15µF configured for all possible combinations of input voltage and output current. When as a cluster of (15×) 1µF ceramic capacitors or as a graduated cluster operating at maximum output current, limit the input voltage range to of 10µF/4.7µF/2.2µF ceramic capacitors of the same case size. Linear VIN < VOUT + 500mV. Technology only recommends X5R or X7R dielectric capacitors. 3071fc 4 For more information www.linear.com/LT3071 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Revision History Typical Application Related Parts