Datasheet LT1581, LT1581-2.5 (Analog Devices) - 8

LT1581/LT1581-2.5
U U W U APPLICATIONS INFORMATION
network must handle until the regulator throttles to the VCONTROL load current level. Capacitors are not ideal elements and + contain parasitic resistance and inductance. These para- sitic elements dominate the change in output voltage at CONTROL V POWER OUTPUT V the beginning of a transient load step change. The ESR of POWER OUT + + the output capacitors produces an instantaneous step in LT1581 output voltage (∆V = ∆I)(ESR). The ESL of the output SENSE capacitors produces a droop proportional to the rate of ADJ VREF R1 change of the output current (V = L)(∆I/∆t). The output capacitance produces a change in output voltage IADJ = 60µA R2 proportional to the time until the regulator can respond V R2 ( ) OUT = VREF 1 + + IADJ (R2) (∆V = ∆t)(∆I/C). These transient effects are illustrated in R1 1581 F05 Figure 4 .
Figure 5. Setting Output Voltage
ESR minimum load current of 10mA. The current out of the EFFECTS ADJUST pin adds to the current from R1. The ADJUST pin ESL current is small, typically 60µA. The output voltage contri- CAPACITANCE EFFECTS EFFECTS bution of the ADJUST pin current is small and only needs 1581 F04 to be considered when very precise output voltage setting V ∆I SLOPE, = POINT AT WHICH REGULATOR t C TAKES CONTROL is required. Note that the top of the resistor divider should be connected directly to the SENSE pin for best regulation.
Figure 4
See the section on grounding and Kelvin sensing above. The use of capacitors with low ESR, low ESL and good
Protection Diodes
high frequency characteristics is critical in meeting the In normal operation the LT1581 does not require protec- output voltage tolerances of these high speed micropro- tion diodes. Older 3-terminal regulators require protection cessors. These requirements dictate a combination of diodes between the OUTPUT pin and the INPUT pin or high quality, surface mount, tantalum and ceramic capaci- between the ADJUST pin and the OUTPUT pin to prevent tors. The location of the decoupling network is critical to die overstress. transient performance. Place the decoupling network as close to the processor pins as possible because trace runs On the LT1581, internal resistors limit internal current from the decoupling capacitors to the processor pins are paths on the ADJUST pin. Therefore even with bypass inductive. The ideal location for the decoupling network is capacitors on the ADJUST pin, no protection diode is actually inside the microprocessor socket cavity. In addi- needed to ensure device safety under short-circuit con- tion, use large power and ground plane areas to minimize ditions. The ADJUST pin can be driven on a transient distribution drops. basis ±7V with respect to the output without any device degradation.
Output Voltage
A protection diode between the OUTPUT pin and the The adjustable version of the LT1581 develops a 1.25V VPOWER pin is usually not needed. An internal diode reference voltage between the SENSE pin and the ADJUST between the OUTPUT pin and the VPOWER pin on the pin (see Figure 5). Placing a resistor R1 between these two LT1581 can handle microsecond surge currents of 50A to terminals causes a constant current to flow through R1 100A. Even with large value output capacitors it is difficult and down through R2 to set the overall output voltage. to obtain those values of surge currents in normal opera- Normally, R1 is chosen so that this current is the specified tion. Only with large values of output capacitance, such as 8