Datasheet LTC2450-1 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungEasy-to-Use, Ultra-Tiny 16-Bit ΔΣ ADC
Seiten / Seite20 / 9 — APPLICATIONS INFORMATION. Conversion Status Monitor. Serial Interface …
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APPLICATIONS INFORMATION. Conversion Status Monitor. Serial Interface Operation Modes. SERIAL INTERFACE

APPLICATIONS INFORMATION Conversion Status Monitor Serial Interface Operation Modes SERIAL INTERFACE

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LTC2450-1
APPLICATIONS INFORMATION Conversion Status Monitor Serial Interface Operation Modes
For certain applications, the user may wish to monitor The following are a few of the more common interface the LTC2450-1 conversion status. This can be achieved operation examples. Many more valid control and serial by holding SCK HIGH during the conversion cycle. In data output operation sequences can be constructed based this condition, whenever the CS input pin is pulled low upon the above description of the function of the three (CS = LOW), the SDO output pin will provide an indication digital interface pins. of the conversion status. SDO = HIGH is an indication of The modes of operation can be summarized as follows: a conversion cycle in progress while SDO = LOW is an indication of a completed conversion cycle. An example 1) The LTC2450-1 functions with SCK idle high (commonly of such a sequence is shown in Figure 4. known as CPOL = 1) or idle low (commonly known as CPOL = 0). Conversion status monitoring, while possible, is not required for LTC2450-1 as its conversion time is fi xed and equal at 2) After the 16th bit is read, the user can choose one of approximately 16.6ms (21ms maximum). Therefore, ex- two ways to begin a new conversion. First, one can ternal timing can be used to determine the completion of a pull CS high (CS = ↑). Second, one can use a high-low conversion cycle. transition on SCK (SCK = ↓). 3) At any time during the Data Output state, pulling CS
SERIAL INTERFACE
high (CS = ↑) causes the part to leave the I/O state, abort the output and begin a new conversion. The LTC2450-1 transmits the conversion result and receives the start of conversion command through a synchronous 4) When SCK = HIGH, it is possible to monitor the conver- 3-wire interface. This interface can be used during the sion status by pulling CS low and watching for SDO CONVERT and SLEEP states to assess the conversion to go low. This feature is available only in the idle-high status and during the DATA OUTPUT state to read the (CPOL = 1) mode. conversion result, and to trigger a new conversion. t1 t2 CS SDO SCK = HI CONVERT SLEEP 24501 F04
Figure 4. Conversion Status Monitoring Mode
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