Datasheet LTC2439-1 (Analog Devices) - 5

LTC2439-1
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range l 2.56 2000 kHz tHEO External Oscillator High Period l 0.25 390 µs tLEO External Oscillator Low Period l 0.25 390 µs tCONV Conversion Time FO = 0V l 143.8 146.7 149.6 ms External Oscillator (Note 10) l 20510/fEOSC (in kHz) ms f ISCK Internal SCK Frequency Internal Oscillator (Note 9) 17.5 kHz External Oscillator (Notes 9, 10) fEOSC/8 kHz DISCK Internal SCK Duty Cycle (Note 9) l 45 55 % fESCK External SCK Frequency Range (Note 8) l 2000 kHz tLESCK External SCK Low Period (Note 8) l 250 ns tHESCK External SCK High Period (Note 8) l 250 ns tDOUT_ISCK Internal SCK 19-Bit Data Output Time Internal Oscillator (Notes 9, 11) l 1.06 1.09 1.11 ms External Oscillator (Notes 9, 10) l 152/fEOSC (in kHz) ms tDOUT_ESCK External SCK 19-Bit Data Output Time (Note 7) l 19/fESCK (in kHz) ms t1 CS ↓ to SDO Low l 0 200 ns t2 CS ↑ to SDO High Z l 0 200 ns t3 CS ↓ to SCK ↓ (Note 9) l 0 200 ns t4 CS ↓ to SCK ↑ (Note 8) l 50 ns tKQMAX SCK ↓ to SDO Valid l 220 ns tKQMIN SDO Hold After SCK ↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS ↓ l 50 ns t6 SCK Hold After CS ↓ l 50 ns t7 SDI Setup Before SCK↑ (Note 5) l 100 ns t8 SDI Hold After SCK↑ (Note 5) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 8:
The converter is in external SCK mode of operation such that the may cause permanent damage to the device. Exposure to any Absolute SCK pin is used as digital input. The frequency of the clock signal driving Maximum Rating condition for extended periods may affect device SCK during the data output is fESCK and is expressed in kHz. reliability and lifetime.
Note 9:
The converter is in internal SCK mode of operation such that the
Note 2:
All voltage values are with respect to GND. SCK pin is used as digital output. In this mode of operation the SCK pin
Note 3:
V has a total equivalent load capacitance C CC = 2.7V to 5.5V unless otherwise specified. LOAD = 20pF. VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; VIN = IN+ – IN–,
Note 10:
The external oscillator is connected to the FO pin. The external VINCM = (IN+ + IN–)/2, IN+ and IN– are defined as the selected positive and oscillator frequency, fEOSC, is expressed in kHz. negative input respectively.
Note 11:
The converter uses the internal oscillator.
Note 4:
FO pin tied to GND or to VCC or to external conversion clock source FO = 0V or FO = VCC. with fEOSC = 153600Hz unless otherwise specified.
Note 12:
1µV RMS noise is independent of VREF. Since the noise
Note 5:
Guaranteed by design, not subject to test. performance is limited by the quantization, lowering VREF improves the
Note 6:
Integral nonlinearity is defined as the deviation of a code from effective resolution. a precise analog input voltage. Maximum specifications are limited by
Note 13:
Guaranteed by design and test correlation. the LSB step size (VREF/216) and the single shot measurement. Typical
Note 14:
The low sleep mode current is valid only when CS is high. specifications are measured from the center of the quantization band.
Note 15:
These parameters are guaranteed by design over the full supply
Note 7:
FO = GND (internal oscillator) or fEOSC = 139800Hz ±2% (external and temperature range. Automated testing procedures are limited by the oscillator). LSB Step Size (VREF/216). 24391fb For more information www.linear.com/LTC2439-1 5 Document Outline Features Applications Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs POWER REQUIREMENTS Timing Characteristics Pin Functions FUNCTIONAL Block Diagram Test CircuitS Applications Information Package Description Revision History Typical Application Related Parts