Datasheet LTC2368-18 (Analog Devices) - 8

LTC2368-18
PIN FUNCTIONS CHAIN (Pin 1):
Chain Mode Selector Pin. When low, the
BUSY (Pin 11):
BUSY Indicator. Goes high at the start of LTC2368-18 operates in normal mode and the RDL/SDI a new conversion and returns low when the conversion input pin functions to enable or disable SDO. When high, has finished. Logic levels are determined by OVDD. the LTC2368-18 operates in chain mode and the RDL/SDI
RDL/SDI (Pin 12):
When CHAIN is low, the part is in nor- pin functions as SDI, the daisy-chain serial data input. mal mode and the pin is treated as a bus enabling input. Logic levels are determined by OVDD. When CHAIN is high, the part is in chain mode and the
VDD (Pin 2):
2.5V Power Supply. The range of VDD is pin is treated as a serial data input pin where data from 2.375V to 2.625V. Bypass VDD to GND with a 10µF ceramic another ADC in the daisy chain is input. Logic levels are capacitor. determined by OVDD.
GND (Pins 3, 6, 10 and 16):
Ground.
SCK (Pin 13):
Serial Data Clock Input. When SDO is enabled,
IN+ (Pin 4):
Analog Input. IN+ operates differential with the conversion result or daisy-chain data from another respect to IN– with an IN+-IN– range of 0V to V ADC is shifted out on the rising edges of this clock MSB REF. first. Logic levels are determined by OVDD.
IN– (Pin 5):
Analog Ground Sense. IN– has an input range of ±100mV with respect to GND and must be tied to the
SDO (Pin 14):
Serial Data Output. The conversion result ground plane or a remote ground sense. or daisy-chain data is output on this pin on each rising edge of SCK MSB first. The output data is in straight binary
REF (Pins 7, 8):
Reference Inputs. The range of REF is 2.5V format. Logic levels are determined by OVDD. to 5.1V. This pin is referred to the GND pin and should be decoupled closely to the pin with a 47µF ceramic capacitor
OVDD (Pin 15):
I/O Interface Digital Power. The range of (X5R, 0805 size). OVDD is 1.71V to 5.25V. This supply is nominally set to the same supply as the host interface (1.8V, 2.5V, 3.3V,
CNV (Pin 9):
Convert Input. A rising edge on this input or 5V). Bypass OVDD to GND with a 0.1µF capacitor. powers up the part and initiates a new conversion. Logic levels are determined by OV
GND (Exposed Pad Pin 17, DFN Package Only):
Ground. DD. Exposed pad must be soldered directly to the ground plane. 236818f 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Timing Diagrams Board Layout Package Description Typical Application Related Parts