Datasheet LTC2281 (Analog Devices)
| Hersteller | Analog Devices |
| Beschreibung | Dual 10-Bit, 125Msps Low Power 3V ADC |
| Seiten / Seite | 24 / 1 — FEATURES. DESCRIPTION. Integrated Dual 10-Bit ADCs. Sample Rate: 125Msps. … |
| Dateiformat / Größe | PDF / 500 Kb |
| Dokumentensprache | Englisch |
FEATURES. DESCRIPTION. Integrated Dual 10-Bit ADCs. Sample Rate: 125Msps. Single 3V Supply (2.85V to 3.4V). Low Power: 790mW
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LTC2281 Dual 10-Bit, 125Msps Low Power 3V ADC
FEATURES DESCRIPTION
n
Integrated Dual 10-Bit ADCs
The LTC®2281 is a 10-bit 125Msps, low power dual 3V n
Sample Rate: 125Msps
A/D converter designed for digitizing high frequency, n
Single 3V Supply (2.85V to 3.4V)
wide dynamic range signals. The LTC2281 is perfect for n
Low Power: 790mW
demanding imaging and communications applications n
61.6dB SNR, 88dB SFDR
with AC performance that includes 61.6dB SNR and 82dB n 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. n Flexible Input: 1VP-P to 2VP-P Range Typical DC specs include ±0.1LSB INL, ±0.1LSB DNL. The n 640MHz Full Power Bandwidth S/H transition noise is a low 0.08LSBRMS. n Clock Duty Cycle Stabilizer n Shutdown and Nap Modes A single 3V supply allows low power operation. A separate n Data Ready Output Clock output supply allows the outputs to drive 0.5V to 3.6V n Pin Compatible Family logic. 125Msps: LTC2283 (12-Bit), LTC2281 (10-Bit) A single-ended CLK input controls converter operation. 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) An optional clock duty cycle stabilizer allows high perfor- 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) mance at full speed for a wide range of clock duty cycles. 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) A data ready output clock (CLKOUT) can be used to latch 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) the output data. n 64-Pin (9mm × 9mm) QFN Package L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIONS
n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation
TYPICAL APPLICATION SNR vs Input Frequency,
OV
–1dB, 2V Range
+ DD 10-BIT ANALOG INPUT PIPELINED D9A 65 INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • 64 D0A 63 OGND 62 61 OF CLK A CLOCK/DUTY CYCLE 60 CONTROL 59 MUX SNR (dBFS) 58 CLK B CLOCK/DUTY CYCLE CLKOUT CONTROL 57 56 OVDD 55 0 50 100 150 200 250 300 350 D9B + OUTPUT • INPUT FREQUENCY (MHz) 2281 TA01b 10-BIT • ANALOG • INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2281 TA01 2281fb 1
FEATURES DESCRIPTION
n
Integrated Dual 10-Bit ADCs
The LTC®2281 is a 10-bit 125Msps, low power dual 3V n
Sample Rate: 125Msps
A/D converter designed for digitizing high frequency, n
Single 3V Supply (2.85V to 3.4V)
wide dynamic range signals. The LTC2281 is perfect for n
Low Power: 790mW
demanding imaging and communications applications n
61.6dB SNR, 88dB SFDR
with AC performance that includes 61.6dB SNR and 82dB n 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. n Flexible Input: 1VP-P to 2VP-P Range Typical DC specs include ±0.1LSB INL, ±0.1LSB DNL. The n 640MHz Full Power Bandwidth S/H transition noise is a low 0.08LSBRMS. n Clock Duty Cycle Stabilizer n Shutdown and Nap Modes A single 3V supply allows low power operation. A separate n Data Ready Output Clock output supply allows the outputs to drive 0.5V to 3.6V n Pin Compatible Family logic. 125Msps: LTC2283 (12-Bit), LTC2281 (10-Bit) A single-ended CLK input controls converter operation. 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) An optional clock duty cycle stabilizer allows high perfor- 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) mance at full speed for a wide range of clock duty cycles. 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) A data ready output clock (CLKOUT) can be used to latch 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) the output data. n 64-Pin (9mm × 9mm) QFN Package L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIONS
n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation
TYPICAL APPLICATION SNR vs Input Frequency,
OV
–1dB, 2V Range
+ DD 10-BIT ANALOG INPUT PIPELINED D9A 65 INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • 64 D0A 63 OGND 62 61 OF CLK A CLOCK/DUTY CYCLE 60 CONTROL 59 MUX SNR (dBFS) 58 CLK B CLOCK/DUTY CYCLE CLKOUT CONTROL 57 56 OVDD 55 0 50 100 150 200 250 300 350 D9B + OUTPUT • INPUT FREQUENCY (MHz) 2281 TA01b 10-BIT • ANALOG • INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2281 TA01 2281fb 1