Datasheet LTC2172-12, LTC2171-12, LTC2170-12 (Analog Devices) - 6

HerstellerAnalog Devices
Beschreibung12-Bit, 65Msps Low Power Quad ADCs
Seiten / Seite34 / 6 — p ower requireMenTs The. denotes the specifications which apply over the …
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p ower requireMenTs The. denotes the specifications which apply over the full operating temperature

p ower requireMenTs The denotes the specifications which apply over the full operating temperature

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LTC2172-12/ LTC2171-12/LTC2170-12
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) LTC2172-12 LTC2171-12 LTC2170-12 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply Voltage (Note 10) l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V OVDD Output Supply Voltage (Note 10) l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V IVDD Analog Supply Current Sine Wave Input l 154 177 94 111 74 83 mA IOVDD Digital Supply Current 1-Lane Mode, 1.75mA Mode 16 16 15 mA 1-Lane Mode, 3.5mA Mode 30 29 28 mA 2-Lane Mode, 1.75mA Mode l 25 28 24 27 24 26 mA 2-Lane Mode, 3.5mA Mode l 47 50 46 50 45 49 mA PDISS Power Dissipation 1-Lane Mode, 1.75mA Mode 306 198 160 mW 1-Lane Mode, 3.5mA Mode 331 221 184 mW 2-Lane Mode, 1.75mA Mode l 322 369 212 248 176 196 mW 2-Lane Mode, 3.5mA Mode l 362 409 252 290 214 238 mW PSLEEP Sleep Mode Power 1 1 1 mW PNAP Nap Mode Power 75 75 75 mW PDIFFCLK Power Increase with Differential Encode Mode Enabled 20 20 20 mW (No Increase for Sleep Mode)
Ti Ming characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2172-12 LTC2171-12 LTC2170-12 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Notes 10, 11) l 5 65 5 40 5 25 MHz tENCL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 7.3 7.69 100 11.88 12.5 100 19 20 100 ns Duty Cycle Stabilizer On l 2 7.69 100 2 12.5 100 2 20 100 ns tENCH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 7.3 7.69 100 11.88 12.5 100 19 20 100 ns Duty Cycle Stabilizer On l 2 7.69 100 2 12.5 100 2 20 100 ns tAP Sample-and-Hold 0 0 0 ns Acquisition Delay Time 21721012fb 6 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts