Datasheet LTC2158-12 (Analog Devices) - 8

LTC2158-12
TYPICAL PERFORMANCE CHARACTERISTICS LTC2158-12: I LTC2158-12: I VDD vs Sample Rate, VDD vs Sample Rate, 15MHz Sine Wave Input, –1dBFS 15MHz Sine Wave Input, –1dBFS LTC2158-12: Frequency Response
80 360 –0.5 340 –1.0 70 LVDS CURRENT 3.5mA –1.5 320 60 –2.0 (mA) (mA) 300 –2.5 50 I VDD I OVDD –3.0 LVDS CURRENT 280 40 1.75mA INPUT AMPLITUDE (dBFS) –3.5 260 –4.0 30 240 –4.5 0 50 100 150 200 250 300 0 62 124 186 248 310 100 1000 SAMPLE RATE (Msps) SAMPLE RATE (Msps) INPUT FREQUENCY (MHz) 215812 G18 215812 G19 215812 G20
PIN FUNCTIONS V – DD (Pins 1, 2, 15, 16, 17, 64):
1.8V Analog Power Supply.
AINB (Pin 12):
Negative Differential Analog Input for Bypass to ground with 0.1µF ceramic capacitors. Pins 1, Channel B. 2, 64 can share a bypass capacitor. Pins 15, 16, 17 can
A + (Pin 13):
Positive Differential Analog Input for share a bypass capacitor.
INB
Channel B.
GND (Pins 3, 6, 9, 11, 14, 18, 21, 58, Exposed Pad ENC+ (Pin 19):
Encode Input. Conversion starts on the
Pin 65):
ADC Power Ground. The exposed pad must be rising edge. soldered to the PCB ground.
ENC– (Pin 20):
Encode Complement Input. Conversion
A + INA (Pin 4):
Positive Differential Analog Input for starts on the falling edge. Channel A.
NC (Pins 24, 25, 42, 43):
Not Connected.
A – INA (Pin 5):
Negative Differential Analog Input for Channel A.
OGND (Pins 33, 48):
Output Driver Ground.
SENSE (Pin 7):
Reference Programming Pin. Connect-
OVDD (Pins 32, 49):
1.8V Output Driver Supply. Bypass ing SENSE to VDD selects the internal reference and a each pin to ground with separate 0.1µF ceramic capacitors. ±0.66V input range. An external reference between 1.230V
SDO (Pin 59):
Serial Interface Data Output. In serial and 1.270V applied to SENSE selects an input range of programming mode, (PAR/SER = 0V), SDO is the optional ±0.528 • VSENSE. serial interface data output. Data on SDO is read back from
VREF (Pin 8):
Reference Voltage Output. Bypass to ground the mode control registers and can be latched on the falling with a 2.2µF ceramic capacitor. Nominally 1.25V. edge of SCK. SDO is an open-drain N-channel MOSFET output that requires an external 2k pull-up resistor from
VCM (Pin 10):
Common Mode Bias Output; nominally 1.8V to 3.3V. If readback from the mode control registers equal to 0.435 • VDD. VCM should be used to bias the is not needed, the pull-up resistor is not necessary and common mode of the analog inputs. Bypass to ground SDO can be left unconnected. with a 0.1µF ceramic capacitor. 215812fa 8 For more information www.linear.com/LTC2158-12 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Power Requirements Digital Inputs And Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Typical Applications Package Description Related Parts