Datasheet LTC1850, LTC1851 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | 8-Channel, 12-Bit, 1.25Msps Sampling ADCs |
| Seiten / Seite | 28 / 10 — PI FU CTIO S. CH0 to CH7 (Pins 1 to 8):. OUT/S5, A1OUT/S4, A0OUT/S3 (Pins … |
| Dateiformat / Größe | PDF / 295 Kb |
| Dokumentensprache | Englisch |
PI FU CTIO S. CH0 to CH7 (Pins 1 to 8):. OUT/S5, A1OUT/S4, A0OUT/S3 (Pins 18 to 20):. COM (Pin 9):. REFOUT (Pin 10):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC1850/LTC1851
U U U PI FU CTIO S CH0 to CH7 (Pins 1 to 8):
Analog Input Pins. Input pins can current sequencer location (S6) is available on this pin. be used single ended relative to the analog input common The output swings between OVDD and OGND. pin (COM) or differentially in pairs (CH0 and CH1, CH2 and
A2
CH3, CH4 and CH5, CH6 and CH7).
OUT/S5, A1OUT/S4, A0OUT/S3 (Pins 18 to 20):
Three- State Digital MUX Address Outputs. Active when RD is
COM (Pin 9):
Analog Input Common Pin. For single-ended low. Following a conversion, the MUX address of the operation (DIFF = 0), COM is the “–” analog input. COM is present conversion is available on these pins concurrent disabled when DIFF is high. with the conversion result. In Readback mode, the MUX address of the current sequencer location (S5-S3) is
REFOUT (Pin 10):
Internal 2.5V Reference Output. Re- available on these pins. The outputs swing between OV quires bypass to analog ground plane with 1µF. DD and OGND.
REFIN (Pin 11):
Reference Mode Select/Reference Buffer
D9/S2 (Pin 21, LTC1850):
Three-State Digital Data Out- Input. REFIN selects the Reference mode and acts as the put. Active when RD is low. Following a conversion, bit 9 reference buffer Input. REFIN tied to ground will produce of the present conversion is available on this pin. In 2.048V on the REFCOMP pin. REFIN tied to the positive Readback mode, the unipolar/bipolar bit of the current supply disables the reference buffer to allow REFCOMP to sequencer location (S2) is available on this pin. The output be driven externally. For voltages between 1V and 2.6V, swings between OV the reference buffer produces an output voltage on the DD and OGND. REFCOMP pin equal to 1.6384 times the voltage on REFIN
D11/S2 (Pin 21, LTC1851):
Three-State Digital Data Out- (4.096V on REFCOMP for a 2.5V input on REFIN). put. Active when RD is low. Following a conversion, bit 11 of the present conversion is available on this pin. In
REFCOMP (Pin 12):
Reference Buffer Output. REFCOMP Readback mode, the unipolar/bipolar bit of the current sets the full-scale input span. The reference buffer pro- sequencer location (S2) is available on this pin. The output duces an output voltage on the REFCOMP pin equal to swings between OV 1.6384 times the voltage on the REFIN pin (4.096V on DD and OGND. REFCOMP for a 2.5V input on REFIN). REFIN tied to
D8/S1 (Pin 22, LTC1850):
Three-State Digital Data Out- ground will produce 2.048V on the REFCOMP pin. puts. Active when RD is low. Following a conversion, bit 8 REFCOMP can be driven externally if REFIN is tied to the of the present conversion is available on this pin. In positive supply. Requires bypass to analog ground plane Readback mode, the gain bit of the current sequencer with 10µF tantalum in parallel with 0.1µF ceramic or 10µF location (S1) is available on this pin. The output swings ceramic. between OVDD and OGND.
GND (Pin 13):
Ground. Tie to analog ground plane.
D10/S1 (Pin 22, LTC1851):
Three-State Digital Data Out- puts. Active when RD is low. Following a conversion, bit 10
VDD (Pin 14):
5V Supply. Short to Pin 15. of the present conversion is available on this pin. In
VDD (Pin 15):
5V Supply. Bypass to GND with 10µF Readback mode, the gain bit of the current sequencer tantalum in parallel with 0.1µF ceramic or 10µF ceramic. location (S1) is available on this pin. The output swings
GND (Pin 16):
Ground for Internal Logic. Tie to analog between OVDD and OGND. ground plane.
D7/S0 (Pin 23, LTC1850):
Three-State Digital Data Out-
DIFF
puts. Active when RD is low. Following a conversion, bit 7
OUT/S6 (Pin 17):
Three-State Digital Data Output. Active when RD is low. Following a conversion, the single- of the present conversion is available on this pin. In ended/differential bit of the present conversion is available Readback mode, the end of sequence bit of the current on this pin concurrent with the conversion result. In sequencer location (S0) is available on this pin. The output Readback mode, the single-ended/differential bit of the swings between OVDD and OGND. 18501f 10
U U U PI FU CTIO S CH0 to CH7 (Pins 1 to 8):
Analog Input Pins. Input pins can current sequencer location (S6) is available on this pin. be used single ended relative to the analog input common The output swings between OVDD and OGND. pin (COM) or differentially in pairs (CH0 and CH1, CH2 and
A2
CH3, CH4 and CH5, CH6 and CH7).
OUT/S5, A1OUT/S4, A0OUT/S3 (Pins 18 to 20):
Three- State Digital MUX Address Outputs. Active when RD is
COM (Pin 9):
Analog Input Common Pin. For single-ended low. Following a conversion, the MUX address of the operation (DIFF = 0), COM is the “–” analog input. COM is present conversion is available on these pins concurrent disabled when DIFF is high. with the conversion result. In Readback mode, the MUX address of the current sequencer location (S5-S3) is
REFOUT (Pin 10):
Internal 2.5V Reference Output. Re- available on these pins. The outputs swing between OV quires bypass to analog ground plane with 1µF. DD and OGND.
REFIN (Pin 11):
Reference Mode Select/Reference Buffer
D9/S2 (Pin 21, LTC1850):
Three-State Digital Data Out- Input. REFIN selects the Reference mode and acts as the put. Active when RD is low. Following a conversion, bit 9 reference buffer Input. REFIN tied to ground will produce of the present conversion is available on this pin. In 2.048V on the REFCOMP pin. REFIN tied to the positive Readback mode, the unipolar/bipolar bit of the current supply disables the reference buffer to allow REFCOMP to sequencer location (S2) is available on this pin. The output be driven externally. For voltages between 1V and 2.6V, swings between OV the reference buffer produces an output voltage on the DD and OGND. REFCOMP pin equal to 1.6384 times the voltage on REFIN
D11/S2 (Pin 21, LTC1851):
Three-State Digital Data Out- (4.096V on REFCOMP for a 2.5V input on REFIN). put. Active when RD is low. Following a conversion, bit 11 of the present conversion is available on this pin. In
REFCOMP (Pin 12):
Reference Buffer Output. REFCOMP Readback mode, the unipolar/bipolar bit of the current sets the full-scale input span. The reference buffer pro- sequencer location (S2) is available on this pin. The output duces an output voltage on the REFCOMP pin equal to swings between OV 1.6384 times the voltage on the REFIN pin (4.096V on DD and OGND. REFCOMP for a 2.5V input on REFIN). REFIN tied to
D8/S1 (Pin 22, LTC1850):
Three-State Digital Data Out- ground will produce 2.048V on the REFCOMP pin. puts. Active when RD is low. Following a conversion, bit 8 REFCOMP can be driven externally if REFIN is tied to the of the present conversion is available on this pin. In positive supply. Requires bypass to analog ground plane Readback mode, the gain bit of the current sequencer with 10µF tantalum in parallel with 0.1µF ceramic or 10µF location (S1) is available on this pin. The output swings ceramic. between OVDD and OGND.
GND (Pin 13):
Ground. Tie to analog ground plane.
D10/S1 (Pin 22, LTC1851):
Three-State Digital Data Out- puts. Active when RD is low. Following a conversion, bit 10
VDD (Pin 14):
5V Supply. Short to Pin 15. of the present conversion is available on this pin. In
VDD (Pin 15):
5V Supply. Bypass to GND with 10µF Readback mode, the gain bit of the current sequencer tantalum in parallel with 0.1µF ceramic or 10µF ceramic. location (S1) is available on this pin. The output swings
GND (Pin 16):
Ground for Internal Logic. Tie to analog between OVDD and OGND. ground plane.
D7/S0 (Pin 23, LTC1850):
Three-State Digital Data Out-
DIFF
puts. Active when RD is low. Following a conversion, bit 7
OUT/S6 (Pin 17):
Three-State Digital Data Output. Active when RD is low. Following a conversion, the single- of the present conversion is available on this pin. In ended/differential bit of the present conversion is available Readback mode, the end of sequence bit of the current on this pin concurrent with the conversion result. In sequencer location (S0) is available on this pin. The output Readback mode, the single-ended/differential bit of the swings between OVDD and OGND. 18501f 10