Datasheet LTC1594, LTC1598 (Analog Devices) - 2
| Hersteller | Analog Devices |
| Beschreibung | 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converter |
| Seiten / Seite | 24 / 2 — ABSOLUTE AXI U. RATI GS. (Notes 1, 2). PACKAGE/ORDER I FOR ATIO. Order … |
| Dateiformat / Größe | PDF / 246 Kb |
| Dokumentensprache | Englisch |
ABSOLUTE AXI U. RATI GS. (Notes 1, 2). PACKAGE/ORDER I FOR ATIO. Order Options. RECO E DED OPERATI G CO DITIO S (Note 5). SYMBOL
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC1594/LTC1598
W W W U ABSOLUTE AXI U RATI GS (Notes 1, 2)
Supply Voltage (VCC) to GND... 12V Power Dissipation .. 500mW Voltage Operating Temperature Range Analog Reference .. – 0.3V to (VCC + 0.3V) LTC1594CS/LTC1598CG ... 0°C to 70°C Analog Inputs .. – 0.3V to (VCC + 0.3V) LTC1594IS/LTC1598IG ... – 40°C to 85°C Digital Inputs ...– 0.3V to 12V Storage Temperature Range ... – 65°C to 150°C Digital Output .. – 0.3V to (VCC + 0.3V) Lead Temperature (Soldering, 10 sec).. 300°C
U W U PACKAGE/ORDER I FOR ATIO
ORDER PART TOP VIEW ORDER PART NUMBER CH5 1 24 CH4 NUMBER TOP VIEW CH6 2 23 CH3 CH0 1 16 VCC LTC1594CS LTC1598CG CH7 3 22 CH2 CH1 2 15 MUXOUT LTC1594IS LTC1598IG GND 4 21 CH1 CH2 3 14 DIN CLK 5 20 CH0 CH3 4 13 CSMUX CSMUX 6 19 VCC ADCIN 5 12 CLK D 7 18 IN MUXOUT V 6 11 REF VCC COM 8 17 ADCIN COM 7 10 DOUT GND 9 16 VREF GND 8 9 CSADC CSADC 10 15 VCC S PACKAGE D 11 14 OUT CLK 16-LEAD PLASTIC SO NC 12 13 NC TJMAX = 125°C, θJA = 120°C/ W G PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/ W
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
WW U U U U RECO E DED OPERATI G CO DITIO S (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage (Note 3) 4.5 5.5 V fCLK Clock Frequency VCC = 5V (Note 4) 320 kHz tCYC Total Cycle Time fCLK = 320kHz 60 μs thDI Hold Time, DIN After CLK↑ VCC = 5V 150 ns tsuCS Setup Time CS↓ Before First CLK↑ (See Operating Sequence) VCC = 5V 1 μs tsuDI Setup Time, DIN Stable Before CLK↑ VCC = 5V 400 ns tWHCLK CLK High Time VCC = 5V 1 μs tWLCLK CLK Low Time VCC = 5V 1 μs tWHCS CS High Time Between Data Transfer Cycles fCLK = 320kHz 16 μs tWLCS CS Low Time During Data Transfer fCLK = 320kHz 44 μs 15948fb 2
W W W U ABSOLUTE AXI U RATI GS (Notes 1, 2)
Supply Voltage (VCC) to GND... 12V Power Dissipation .. 500mW Voltage Operating Temperature Range Analog Reference .. – 0.3V to (VCC + 0.3V) LTC1594CS/LTC1598CG ... 0°C to 70°C Analog Inputs .. – 0.3V to (VCC + 0.3V) LTC1594IS/LTC1598IG ... – 40°C to 85°C Digital Inputs ...– 0.3V to 12V Storage Temperature Range ... – 65°C to 150°C Digital Output .. – 0.3V to (VCC + 0.3V) Lead Temperature (Soldering, 10 sec).. 300°C
U W U PACKAGE/ORDER I FOR ATIO
ORDER PART TOP VIEW ORDER PART NUMBER CH5 1 24 CH4 NUMBER TOP VIEW CH6 2 23 CH3 CH0 1 16 VCC LTC1594CS LTC1598CG CH7 3 22 CH2 CH1 2 15 MUXOUT LTC1594IS LTC1598IG GND 4 21 CH1 CH2 3 14 DIN CLK 5 20 CH0 CH3 4 13 CSMUX CSMUX 6 19 VCC ADCIN 5 12 CLK D 7 18 IN MUXOUT V 6 11 REF VCC COM 8 17 ADCIN COM 7 10 DOUT GND 9 16 VREF GND 8 9 CSADC CSADC 10 15 VCC S PACKAGE D 11 14 OUT CLK 16-LEAD PLASTIC SO NC 12 13 NC TJMAX = 125°C, θJA = 120°C/ W G PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/ W
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
WW U U U U RECO E DED OPERATI G CO DITIO S (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage (Note 3) 4.5 5.5 V fCLK Clock Frequency VCC = 5V (Note 4) 320 kHz tCYC Total Cycle Time fCLK = 320kHz 60 μs thDI Hold Time, DIN After CLK↑ VCC = 5V 150 ns tsuCS Setup Time CS↓ Before First CLK↑ (See Operating Sequence) VCC = 5V 1 μs tsuDI Setup Time, DIN Stable Before CLK↑ VCC = 5V 400 ns tWHCLK CLK High Time VCC = 5V 1 μs tWLCLK CLK Low Time VCC = 5V 1 μs tWHCS CS High Time Between Data Transfer Cycles fCLK = 320kHz 16 μs tWLCS CS Low Time During Data Transfer fCLK = 320kHz 44 μs 15948fb 2