Datasheet LTC1291 (Analog Devices) - 9

LTC1291
O U U W U APPLICATI S I FOR ATIO Input Data Word Multiplexer Channel Selection
The 4-bit data word is clocked into the D
MUX ADDRESS CHANNEL #
IN pin on the rising edge of the clock after chip select goes low and the start
SGL/DIFF ODD/SIGN 0 1 GND
bit has been recognized. Further inputs on the D 1 0 + – IN pin are 1 1 + – then ignored until the next CS cycle. The input word is 0 0 + – defined as follows: 0 1 – + MSB-FIRST/ LSB-FIRST
MSB-First/LSB-First (MSBF)
START SGL/ ODD/ MSBF DIFF PS SIGN The output data of the LTC1291 is programmed for MSB- MUX ADDRESS POWER first or LSB-first sequence using the MSBF bit. When the SHUTDOWN 1291 F02 MSBF bit is a logical one, data will appear on the DOUT line
Figure 2. Input Data Word
in MSB-first format. Logical zeroes will be filled in indefi- nitely following the last data bit to accommodate longer
Start Bit
word lengths required by some microprocessors. When The first␣ “logical one” clocked into the DIN input after CS the MSBF bit is a logical zero, LSB-first data will follow the goes low is the start bit. The start bit initiates the data normal MSB-first data on the DOUT line (see Operating transfer and all leading zeroes which precede this logical Sequence). one will be ignored. After the start bit is received, the remaining bits of the input word will be clocked in. Further
Power Shutdown
inputs on the DIN pin are then ignored until the next CS The power shutdown feature of the LTC1291 is activated cycle. by making the PS bit a logical zero. If CS remains low after the PS bit has been received, a 12-bit DOUT word with all
MUX Address
logical ones will be shifted out followed by logical zeroes The bits of the input word following the START BIT assign until CS goes high. Then the DOUT line will go into its high the MUX configuration for the requested conversion. For impedance state. The LTC1291 will remain in the shut- a given channel selection, the converter will measure the down mode until the next CS cycle. There is no warm-up voltage between the two channels indicated by the “+” and or wait period required after coming out of the power “–” signs in the selected row of the following table. In shutdown cycle so a conversion can commence after CS single-ended mode, all input channels are measured with goes low (see Power Shutdown Operating Sequence). respect to GND. Only the “+” inputs have sample-and- holds. Signals applied at the “–” inputs must not change more than the required accuracy during the conversion. 1291fa 9