Datasheet LTC1272 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | 12-Bit, 3µs, 250kHz Sampling A/D Converter |
| Seiten / Seite | 22 / 5 — ELECTRICAL CHARACTERISTICS. Note 1:. Note 5:. Note 6:. Note 2:. Note 3:. … |
| Dateiformat / Größe | PDF / 297 Kb |
| Dokumentensprache | Englisch |
ELECTRICAL CHARACTERISTICS. Note 1:. Note 5:. Note 6:. Note 2:. Note 3:. Note 7:. Note 8:. Note 4:
Modelllinie für dieses Datenblatt
- LTC1272-3ACN#PBF LTC1272-3ACSW#PBF LTC1272-3ACSW#TRPBF LTC1272-3CCN#PBF LTC1272-3CCSW#PBF LTC1272-3CCSW#TRPBF LTC1272-8ACN#PBF LTC1272-8ACSW#PBF LTC1272-8ACSW#TRPBF LTC1272-8CCN#PBF LTC1272-8CCSW#PBF LTC1272-8CCSW#TRPBF
Textversion des Dokuments
LTC1272
ELECTRICAL CHARACTERISTICS Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Linearity error is specified between the actual end points of the may cause permanent damage to the device. Exposure to any Absolute A/D transfer curve. Maximum Rating condition for extended periods may affect device
Note 6:
The LTC1272 has the same 0V to 5V input range as the AD7572 reliability and lifetime. but, to achieve single supply operation, it provides a 2.42V reference
Note 2:
All voltage values are with respect to ground with DGND and output instead of the –5.25V of the AD7572. This requires that the polarity AGND wired together, unless otherwise noted. of the reference bypass capacitor be reversed when plugging an LTC1272
Note 3:
When the analog input voltage is taken below ground it will be into an AD7572 socket. clamped by an internal diode. This product can handle, with no external
Note 7:
Guaranteed by design, not subject to test. diode, input currents of greater than 60mA below ground without latch-up.
Note 8:
VDD = 5V. Timing specifications are sample tested at 25°C to
Note 4:
VDD = 5V, fCLK = 4MHz for LTC1272-3, and 1.6MHz for ensure compliance. All input control signals are specified with tr = tf = 5ns LTC1272-8, tr = tf = 5ns unless otherwise specified. For best analog (10% to 90% of 5V) and timed from a voltage level of 1.6V. See Figures 13 performance, the LTC1272 clock should be synchronized to the RD and through 17. CS control inputs with at least 40ns separating convert start from the nearest clock edge. 1272fc For more information www.linear.com/1272 5 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION CONVERTER CHARACTERISTICS INTERNAL REFERENCE CHARACTERISTICS DIGITAL AND DC ELECTRICAL CHARACTERISTICS DYNAMIC ACCURACY ANALOG INPUT TIMING CHARACTERISTICS PIN FUNCTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION REVISION HISTORY PACKAGE DESCRIPTION
ELECTRICAL CHARACTERISTICS Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Linearity error is specified between the actual end points of the may cause permanent damage to the device. Exposure to any Absolute A/D transfer curve. Maximum Rating condition for extended periods may affect device
Note 6:
The LTC1272 has the same 0V to 5V input range as the AD7572 reliability and lifetime. but, to achieve single supply operation, it provides a 2.42V reference
Note 2:
All voltage values are with respect to ground with DGND and output instead of the –5.25V of the AD7572. This requires that the polarity AGND wired together, unless otherwise noted. of the reference bypass capacitor be reversed when plugging an LTC1272
Note 3:
When the analog input voltage is taken below ground it will be into an AD7572 socket. clamped by an internal diode. This product can handle, with no external
Note 7:
Guaranteed by design, not subject to test. diode, input currents of greater than 60mA below ground without latch-up.
Note 8:
VDD = 5V. Timing specifications are sample tested at 25°C to
Note 4:
VDD = 5V, fCLK = 4MHz for LTC1272-3, and 1.6MHz for ensure compliance. All input control signals are specified with tr = tf = 5ns LTC1272-8, tr = tf = 5ns unless otherwise specified. For best analog (10% to 90% of 5V) and timed from a voltage level of 1.6V. See Figures 13 performance, the LTC1272 clock should be synchronized to the RD and through 17. CS control inputs with at least 40ns separating convert start from the nearest clock edge. 1272fc For more information www.linear.com/1272 5 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION CONVERTER CHARACTERISTICS INTERNAL REFERENCE CHARACTERISTICS DIGITAL AND DC ELECTRICAL CHARACTERISTICS DYNAMIC ACCURACY ANALOG INPUT TIMING CHARACTERISTICS PIN FUNCTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION REVISION HISTORY PACKAGE DESCRIPTION