Datasheet LTC1099 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | High Speed 8-Bit A/D Converter with Built-In Sample-and-Hold |
| Seiten / Seite | 16 / 5 — PIN FUNCTIONS. VIN (Pin 1):. INT (Pin 9):. DB0 to DB3 (Pins 2 to 5):. GND … |
| Dateiformat / Größe | PDF / 204 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. VIN (Pin 1):. INT (Pin 9):. DB0 to DB3 (Pins 2 to 5):. GND (Pin 10):. WR/RDY (Pin 6):. REF– (Pin 11):. REF+ (Pin 12):
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LTC1099
U U U PIN FUNCTIONS VIN (Pin 1):
Analog Input.
INT (Pin 9):
Output that goes low when the conversion in process is complete and goes high after data is read.
DB0 to DB3 (Pins 2 to 5):
Data Outputs. DB0 = LSB.
GND (Pin 10):
Ground Connection.
WR/RDY (Pin 6):
WR/RDY is an input when M0DE = VCC. Falling edge of WR switches internal S/H to hold then
REF– (Pin 11):
Low Reference Potential (Analog Ground). starts conversion. WR/RDY is an open drain output (active
REF+ (Pin 12):
High Reference Potential. V pull-down) when M0DE = GND. RDY goes low at start of REF = Full Scale = (REF+) – (REF–). conversion and pull-down is turned off when conversion is complete. Resistive pull-up is usually used in this mode.
CS (Pin 13):
Chip Select. When high, data outputs are high impedance and all inputs are ignored.
MODE (Pin 7):
WR-RD when MODE = VCC. RD when M0DE = GND. No internal pull-down.
DB4 to DB7 (Pins 14 to 17):
Data Outputs. DB7 = MSB.
RD (Pin 8):
A Low on RD with CS Low Activates Three-
OFL (Pin 18):
Overflow Output. Goes low when VIN > VREF. State Outputs. With MODE = GND and CS low, the falling
TC (Pin 19):
User Adjustable Conversion Time. edge of RD switches internal S/H to hold and starts conversion.
VCC (Pin 20):
Positive Supply. 4.75V ≤ VCC ≤ 5.25V.
TEST CIRCUITS t1H
tr = 20ns, CL = 10pF tr V V CC CC 90% RD 50% 10% GND RD t DATA 1H CS OUT V0H 90% CL 1k DATA OUT GND
t0H
tr = 20ns, CL = 10pF t V r CC VCC VCC 90% 1k RD 50% RD 10% DATA GND CS OUT t0H CL VCC DATA OUT 10% V0L 1099 F01
Figure 1. Three-State Test Circuit
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U U U PIN FUNCTIONS VIN (Pin 1):
Analog Input.
INT (Pin 9):
Output that goes low when the conversion in process is complete and goes high after data is read.
DB0 to DB3 (Pins 2 to 5):
Data Outputs. DB0 = LSB.
GND (Pin 10):
Ground Connection.
WR/RDY (Pin 6):
WR/RDY is an input when M0DE = VCC. Falling edge of WR switches internal S/H to hold then
REF– (Pin 11):
Low Reference Potential (Analog Ground). starts conversion. WR/RDY is an open drain output (active
REF+ (Pin 12):
High Reference Potential. V pull-down) when M0DE = GND. RDY goes low at start of REF = Full Scale = (REF+) – (REF–). conversion and pull-down is turned off when conversion is complete. Resistive pull-up is usually used in this mode.
CS (Pin 13):
Chip Select. When high, data outputs are high impedance and all inputs are ignored.
MODE (Pin 7):
WR-RD when MODE = VCC. RD when M0DE = GND. No internal pull-down.
DB4 to DB7 (Pins 14 to 17):
Data Outputs. DB7 = MSB.
RD (Pin 8):
A Low on RD with CS Low Activates Three-
OFL (Pin 18):
Overflow Output. Goes low when VIN > VREF. State Outputs. With MODE = GND and CS low, the falling
TC (Pin 19):
User Adjustable Conversion Time. edge of RD switches internal S/H to hold and starts conversion.
VCC (Pin 20):
Positive Supply. 4.75V ≤ VCC ≤ 5.25V.
TEST CIRCUITS t1H
tr = 20ns, CL = 10pF tr V V CC CC 90% RD 50% 10% GND RD t DATA 1H CS OUT V0H 90% CL 1k DATA OUT GND
t0H
tr = 20ns, CL = 10pF t V r CC VCC VCC 90% 1k RD 50% RD 10% DATA GND CS OUT t0H CL VCC DATA OUT 10% V0L 1099 F01
Figure 1. Three-State Test Circuit
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