Datasheet LTC1090 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Single Chip 10-Bit Data Acquisition System |
| Seiten / Seite | 28 / 9 — TYPICAL PERFOR A CE CHARACTERISTICS. Digital Input Logic Threshold vs. … |
| Dateiformat / Größe | PDF / 356 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFOR A CE CHARACTERISTICS. Digital Input Logic Threshold vs. Input Channel Leakage Current. Supply Voltage
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LTC1090
W U TYPICAL PERFOR A CE CHARACTERISTICS Digital Input Logic Threshold vs Input Channel Leakage Current Supply Voltage vs Temperature Noise Error vs Reference Voltage
1000 2.0 4 T LTC1090 NOISE = 200µV PEAK-TO-PEAK A = 25°C 900 1.75 GUARANTEED 800 3 1.5 700 1.25 600 2 500 1.0 400 0.75 300 ON CHANNEL LOGIC THRESHOLD (V) 1 0.5 200 OFF CHANNELS PEAK-TO-PEAK NOISE ERROR (LSBs) 0.25 100 INPUT CHANNEL LEAKAGE CURRENT (nA) 0 4 5 6 7 8 9 10 –50 –25 0 25 50 75 100 125 0.2 1 5 SUPPLY VOLTAGE, V AMBIENT TEMPERATURE, T REFERENCE VOLTAGE, V A (°C) REF (V) CC (V) LTC1090 • TPC20 LTC1090 • TPC21 LTC1090 • TPC19
U U W U APPLICATIO S I FOR ATIO
The LTC1090 is a data acquisition component which
DIGITAL CONSIDERATIONS
contains the following functional blocks:
1. Serial Interface
1. 10-bit successive approximation capacitive The LTC1090 communicates with microprocessors and A/D converter other external circuitry via a synchronous, full duplex, 2. Analog multiplexer (MUX) four wire serial interface (see Operating Sequence). The 3. Sample and hold (S/H) shift clock (SCLK) synchronizes the data transfer with each bit being transmitted on the falling SCLK edge 4. Synchronous, full duplex serial interface and captured on the rising SCLK edge in both transmit- 5. Control and timing logic ting and receiving systems. The data is transmitted and received simultaneously (full duplex).
Operating Sequence (Example: Differential Inputs (CH3 to CH2), Bipolar, MSB First and 10-Bit Word Length)
tCYC 1 5 8 10 SCLK DON’T CARE tSMPL tCONV CS SGL/ D ODD/ IN DIFF SEL1 SEL0 UNI MSBF WL1 WL0 DON’T CARE SIGN DOUT B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 (SB) SHIFT CONFIGURATION SHIFT A/D RESULT OUT AND WORD IN NEW CONFIGURATION WORD IN LTC1090 • AI01 1090fc 9
W U TYPICAL PERFOR A CE CHARACTERISTICS Digital Input Logic Threshold vs Input Channel Leakage Current Supply Voltage vs Temperature Noise Error vs Reference Voltage
1000 2.0 4 T LTC1090 NOISE = 200µV PEAK-TO-PEAK A = 25°C 900 1.75 GUARANTEED 800 3 1.5 700 1.25 600 2 500 1.0 400 0.75 300 ON CHANNEL LOGIC THRESHOLD (V) 1 0.5 200 OFF CHANNELS PEAK-TO-PEAK NOISE ERROR (LSBs) 0.25 100 INPUT CHANNEL LEAKAGE CURRENT (nA) 0 4 5 6 7 8 9 10 –50 –25 0 25 50 75 100 125 0.2 1 5 SUPPLY VOLTAGE, V AMBIENT TEMPERATURE, T REFERENCE VOLTAGE, V A (°C) REF (V) CC (V) LTC1090 • TPC20 LTC1090 • TPC21 LTC1090 • TPC19
U U W U APPLICATIO S I FOR ATIO
The LTC1090 is a data acquisition component which
DIGITAL CONSIDERATIONS
contains the following functional blocks:
1. Serial Interface
1. 10-bit successive approximation capacitive The LTC1090 communicates with microprocessors and A/D converter other external circuitry via a synchronous, full duplex, 2. Analog multiplexer (MUX) four wire serial interface (see Operating Sequence). The 3. Sample and hold (S/H) shift clock (SCLK) synchronizes the data transfer with each bit being transmitted on the falling SCLK edge 4. Synchronous, full duplex serial interface and captured on the rising SCLK edge in both transmit- 5. Control and timing logic ting and receiving systems. The data is transmitted and received simultaneously (full duplex).
Operating Sequence (Example: Differential Inputs (CH3 to CH2), Bipolar, MSB First and 10-Bit Word Length)
tCYC 1 5 8 10 SCLK DON’T CARE tSMPL tCONV CS SGL/ D ODD/ IN DIFF SEL1 SEL0 UNI MSBF WL1 WL0 DON’T CARE SIGN DOUT B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 (SB) SHIFT CONFIGURATION SHIFT A/D RESULT OUT AND WORD IN NEW CONFIGURATION WORD IN LTC1090 • AI01 1090fc 9