Datasheet ADA4898-1, ADA4898-2 (Analog Devices) - 5

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Data Sheet ADA4898-1/ADA4898-2 ABSOLUTE MAXIMUM RATINGS Table 3.
The power dissipated in the package (PD) is the sum of the
Parameter Rating
quiescent power dissipation and the power dissipated in the package due to the output load drive. The quiescent power is Supply Voltage 36 V the voltage between the supply pins (V Power Dissipation See Figure 4 S) times the quiescent current (I Differential Mode Input Voltage ±1.5 V S). The power dissipated due to the load drive depends upon the particular application. For each output, the power due Common-Mode Input Voltage ±11.4 V to load drive is calculated by multiplying the load current by the Storage Temperature Range −65°C to +150°C associated voltage drop across the device. RMS voltages and Operating Temperature Range −40°C to +105°C currents must be used in these calculations. Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads Stresses at or above those listed under Absolute Maximum from metal traces, through holes, ground, and power planes Ratings may cause permanent damage to the product. This is a reduces the θ stress rating only; functional operation of the product at these JA. The exposed paddle on the underside of the package must be soldered to a pad on the PCB surface that is or any other conditions above those indicated in the operational thermal y connected to a copper plane to achieve the specified θ section of this specification is not implied. Operation beyond JA. the maximum operating conditions for extended periods may Figure 4 shows the maximum power dissipation vs. the ambient affect product reliability. temperature for the single and dual 8-lead SOIC_N_EP on a JEDEC standard 4-layer board, with its underside paddle
THERMAL RESISTANCE
soldered to a pad that is thermally connected to a PCB plane. θJA θJA is specified for the worst-case conditions; that is, θJA is values are approximations. specified for a device soldered in the circuit board with its
5.0
exposed paddle soldered to a pad on the PCB surface that is
4.5
thermally connected to a copper plane, with zero airflow.
) (W 4.0 N Table 4. TIO 3.5 Package Type θ PA ADA4898-2 JA θJC Unit 3.0 ISSI
Single 8-Lead SOIC_N_EP on a 4-Layer Board 47 29 °C/W
D 2.5
Dual 8-Lead SOIC_N_EP on a 4-Layer Board 42 29 °
ER
C/W
W ADA4898-1 2.0 MAXIMUM POWER DISSIPATION M PO 1.5 MU
The maximum safe power dissipation in the ADA4898-1/
XI 1.0 MA
ADA4898-2 package is limited by the associated rise in junction
0.5
temperature (TJ) on the die. At approximately 150°C, which is
0
the glass transition temperature, the plastic changes its properties.
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
003
AMBIENT TEMPERATURE (°C)
Even temporarily exceeding this temperature limit can change 07037- the stresses that the package exerts on the die, permanently Figure 4. Maximum Power Dissipation vs. Ambient Temperature shifting the parametric performance of the ADA4898-1/
ESD CAUTION
ADA4898-2. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. Rev. E | Page 5 of 20 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V SUPPLY ±5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION (POWER-DOWN) PIN FOR THE ADA4898-1 APPLICATIONS INFORMATION HIGHER FEEDBACK RESISTOR GAIN OPERATION RECOMMENDED VALUES FOR VARIOUS GAINS NOISE CIRCUIT CONSIDERATIONS PCB LAYOUT POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES