Datasheet ADA4627-1, ADA4637-1 (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung30 V, 80 MHz, Low Noise, Low Bias Current, JFET Op Amp
Seiten / Seite20 / 8 — ADA4627-1/ADA4637-1. Data Sheet. 0.01. ADA4627-1. TA = 25°C VSY = ±15V V. …
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ADA4627-1/ADA4637-1. Data Sheet. 0.01. ADA4627-1. TA = 25°C VSY = ±15V V. IN = 6V rms. RL = 600Ω. mA) (. 0.001. 80kHz FILTER. N (. CURRE. HD +

ADA4627-1/ADA4637-1 Data Sheet 0.01 ADA4627-1 TA = 25°C VSY = ±15V V IN = 6V rms RL = 600Ω mA) ( 0.001 80kHz FILTER N ( CURRE HD +

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ADA4627-1/ADA4637-1 Data Sheet 8 0.01 ADA4627-1 7 TA = 25°C VSY = ±15V V 6 IN = 6V rms RL = 600Ω mA) ( 0.001 80kHz FILTER 5 NT %) N ( 4 CURRE HD + Y T L 3 P 0.0001 UP S 2 ADA4627-1 1 TA = 25°C SOIC PACKAGE
071
0 0.00001
07559-
0 4 8 12 16 20 24 28 32 36
015
0.01 0.1 1 10 SUPPLY VOLTAGE (V) FREQUENCY (kHz)
07559- Figure 16. Supply Current vs. Supply Voltage Figure 19. THD + N vs. Frequency
0.1 10,000 ADA4627-1 VSY = ±15V 1,000 0.01 MEASURED 100 %) A) N ( p 0.001 ( I B HD + T 10 ADA4627-1 TA = 25°C 0.0001 V EXTRAPOLATED SY = ±15V V 1 IN = 1kHz RL = 600Ω y = 0.28950.0647x 80kHz FILTER
078 072
R2 = 0.9991
07559-
0.00001
07559-
0.1 0.01 0.1 1 10 10 30 50 70 90 110 130 AMPLITUDE (V rms) TEMPERATURE (°C)
Figure 17. THD + N vs. V Figure 20. Input Bias Current vs. Temperature IN
60 100 ADA4627-1 IB+ 50 T 75 A = 25°C VSY = ±15V +85°C IB– 40 50 AV = +100 B) 30 25 (d I +25ºC B+ N A) AI 20 p ( 0 G AV = +10 I B IB– 10 –25 0 –50 AV = +1 ADA4627-1 –10 –75 VSY = ±15V
070 073
–20
07559-
–100
07559-
10 100 1k 10k 100k 1M 10M 100M –15 –10 –5 0 5 10 15 FREQUENCY (kHz) V CM (V)
Figure 18. Closed-Loop Gain vs. Frequency Figure 21. Input Bias Current vs. VCM and Temperature Rev. F | Page 8 of 20 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS—30 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT VOLTAGE RANGE INPUT OFFSET VOLTAGE ADJUST RANGE INPUT BIAS CURRENT NOISE CONSIDERATIONS THD + N MEASUREMENTS PRINTED CIRCUIT BOARD LAYOUT, BIAS CURRENT, AND BYPASSING OUTPUT PHASE REVERSAL DECOMPENSATED OP AMPS DRIVING CAPACITIVE LOADS OUTLINE DIMENSIONS ORDERING GUIDE