Datasheet ADA4001-2 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | Low Noise, Low Input Bias Current, Rail-to-Rail Output, JFET Dual Op Amp |
| Seiten / Seite | 13 / 8 — Data Sheet. ADA4001-2. VSY = ±15V. TA = 25°C. E (V). 0.1%. EP SI. 0.01%. … |
| Revision | C |
| Dateiformat / Größe | PDF / 372 Kb |
| Dokumentensprache | Englisch |
Data Sheet. ADA4001-2. VSY = ±15V. TA = 25°C. E (V). 0.1%. EP SI. 0.01%. 0.2. 0.4. 0.6. 0.8. 1.0. 1.2. SETTLING TIME (µs). 100. VSY = ±15V T. A = 25°C
Textversion des Dokuments
Data Sheet ADA4001-2 12 12 ADA4001-2 ADA4001-2 VSY = ±15V VSY = ±15V 10 TA = 25°C 10 TA = 25°C 8 8 E (V) 0.1% E (V) Z Z 6 6 0.1% EP SI EP SI 0.01% ST 0.01% ST 4 4 2 2 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2
029
0 0.2 0.4 0.6 0.8 1.0 1.2
018
SETTLING TIME (µs) SETTLING TIME (µs)
10375- 10375- Figure 14. Settling Time Positive Step Figure 17. Settling Time Negative Step
12 100 ADA4001-2 10 VSY = ±15V T 8 ) A = 25°C Hz 6 V/ 4 Y (n T 2 SI ADA4001-2 EN S (V) V T 0 SY = ±15V 10 L TA = 25°C –2 ISE D VO AV = +1 O RL = 2kΩ –4 C E N L = 100pF G –6 A T L –8 VO –10 –12 1 0 1 2 3 4 5 6 7 8 9 10
030
0.001 0.01 0.1 1 10 100
021
TIME (µs) FREQUENCY (kHz)
10375- 10375- Figure 15. Large Signal Transient Response Figure 18. Voltage Noise Density
75 50 ADA4001-2 V 45 SY = ±15V TA = 25°C 50 A 40 V = +1 35 25 ) OS+ V) (% 30 T E (m ADA4001-2 O G O 0 V 25 A SY = ±15V T T SH A = 25°C L AV = +1 20 VO VER R –25 L = 2kΩ O CL = 100pF 15 OS– 10 –50 5 –75 0 0 2 4 6 8 10
017
0.01 0.1 1
022
TIME (µs) CAPACITANCE (nF)
10375- 10375- Figure 16. Small Signal Transient Response Figure 19. Overshoot vs. Load Capacitance Rev. C | Page 7 of 12 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Applications Information Total Noise Including Source Resistors I-V Conversion Applications Photodiode Circuits Input Bias Current Noise Considerations Outline Dimensions Ordering Guide
029
0 0.2 0.4 0.6 0.8 1.0 1.2
018
SETTLING TIME (µs) SETTLING TIME (µs)
10375- 10375- Figure 14. Settling Time Positive Step Figure 17. Settling Time Negative Step
12 100 ADA4001-2 10 VSY = ±15V T 8 ) A = 25°C Hz 6 V/ 4 Y (n T 2 SI ADA4001-2 EN S (V) V T 0 SY = ±15V 10 L TA = 25°C –2 ISE D VO AV = +1 O RL = 2kΩ –4 C E N L = 100pF G –6 A T L –8 VO –10 –12 1 0 1 2 3 4 5 6 7 8 9 10
030
0.001 0.01 0.1 1 10 100
021
TIME (µs) FREQUENCY (kHz)
10375- 10375- Figure 15. Large Signal Transient Response Figure 18. Voltage Noise Density
75 50 ADA4001-2 V 45 SY = ±15V TA = 25°C 50 A 40 V = +1 35 25 ) OS+ V) (% 30 T E (m ADA4001-2 O G O 0 V 25 A SY = ±15V T T SH A = 25°C L AV = +1 20 VO VER R –25 L = 2kΩ O CL = 100pF 15 OS– 10 –50 5 –75 0 0 2 4 6 8 10
017
0.01 0.1 1
022
TIME (µs) CAPACITANCE (nF)
10375- 10375- Figure 16. Small Signal Transient Response Figure 19. Overshoot vs. Load Capacitance Rev. C | Page 7 of 12 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Applications Information Total Noise Including Source Resistors I-V Conversion Applications Photodiode Circuits Input Bias Current Noise Considerations Outline Dimensions Ordering Guide