Datasheet MCP6286 (Microchip) - 3

HerstellerMicrochip
BeschreibungThe MCP6286 operational amplifier offers low noise, low power and rail-to-rail output operation
Seiten / Seite28 / 3 — MCP6286. 1.0. ELECTRICAL CHARACTERISTICS. 1.1. Absolute Maximum Ratings …
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MCP6286. 1.0. ELECTRICAL CHARACTERISTICS. 1.1. Absolute Maximum Ratings †. † Notice:. 4.1.2 “Input Voltage And Current Limits”

MCP6286 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings † † Notice: 4.1.2 “Input Voltage And Current Limits”

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MCP6286 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings †
V
† Notice:
DD – VSS ..7.0V Stresses above those listed under “Absolute Current at Input Pins ...±2 mA Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of Analog Inputs (VIN+, VIN-)†† .. VSS – 1.0V to VDD + 1.0V the device at those or any other conditions above those All Other Inputs and Outputs ... VSS – 0.3V to VDD + 0.3V indicated in the operational listings of this specification is not Difference Input Voltage .. |V implied. Exposure to maximum rating conditions for extended DD – VSS| periods may affect device reliability. Output Short-Circuit Current ...continuous
††
See
4.1.2 “Input Voltage And Current Limits”
Current at Output and Supply Pins ..±30 mA Storage Temperature ..-65°C to +150°C Maximum Junction Temperature (TJ).. +150°C ESD protection on all pins (HBM; MM) .. ≥ 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS Electrical Characteristics
: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3, V ≈ OUT VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions Input Offset
Input Offset Voltage VOS -1.5 — +1.5 mV Input Offset Drift with Temperature ΔVOS/ΔTA — ±1 — µV/°C TA= -40°C to +125°C Power Supply Rejection Ratio PSRR 80 100 — dB
Input Bias Current and Impedance
Input Bias Current IB — ±1 — pA — 50 150 pA TA = +85°C — 1500 3000 pA TA = +125°C Input Offset Current IOS — ±1 — pA Common Mode Input Impedance ZCM — 1013||20 — Ω||pF Differential Input Impedance ZDIFF — 1013||20 — Ω||pF
Common Mode
Common Mode Input Voltage V − CMR VSS 0.3 — VDD-1.2 V
Note 1
Range Common Mode Rejection Ratio CMRR 76 95 — dB VCM = -0.3V to 1.0V, VDD = 2.2V 80 100 — dB VCM = -0.3V to 4.3V, VDD = 5.5V
Open-Loop Gain
DC Open-Loop Gain AOL 100 120 — dB 0.2V < VOUT <(VDD-0.2V) (Large Signal)
Output
Maximum Output Voltage Swing VOL, VOH VSS+15 — VDD–15 mV 0.5V Input overdrive VSS+75 — VDD–75 mV 0.5V Input overdrive RL = 2 kΩ Output Short-Circuit Current ISC — ±20 — mA
Note 1:
Figure 2-12 shows how VCMR changes across temperature. © 2009 Microchip Technology Inc. DS22196A-page 3 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Common Mode Input Voltage Headroom vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs Ambient Temperature. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 2.2V. FIGURE 2-22: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-Inverting Pulse Response. FIGURE 2-28: Small Signal Inverting Pulse Response. FIGURE 2-29: Large Signal Non-Inverting Pulse Response. FIGURE 2-30: Large Signal Inverting Pulse Response. FIGURE 2-31: The MCP6286 Shows No Phase Reversal. FIGURE 2-32: Closed Loop Output Impedance vs. Frequency. FIGURE 2-33: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-4: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout for Inverting Gain. 4.6 Application Circuits FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information