Datasheet MIC7122 (Microchip) - 6

MIC7122 Micrel
Application Information
voltage drop (V ) and the output (load) current (I ). DROP OUT Total on-chip power dissipation is:
Input Common-Mode Voltage
P = P + P The MIC7122 tolerates input overdrive by at least 300mV D S O beyond either rail without producing phase inversion. P = V I + V I D S S DROP OUT If the absolute maximum input voltage is exceeded, the input where: current should be limited to ±5mA maximum to prevent P = total on-chip power D reducing reliability. A 10kΩ series input resistor, used as a P = supply power dissipation S current limiter, will protect the input structure from voltages as P = output power dissipation large as 50V above the supply or below ground. See Figure O 1. V = V – V S V+ V– I = power supply current S V = V – V (sourcing current) DROP V+ OUT V = V – V (sinking current) V DROP OUT V– OUT RIN VIN 10kΩ The above addresses only steady state (dc) conditions. For non-dc conditions the user must estimate power dissipation
Figure 1. Input Current-Limit Protection
based on rms value of the signal.
Output Voltage Swing
The task is one of determining the allowable on-chip power Sink and source output resistances of the MIC7122 are dissipation for operation at a given ambient temperature and equal. Maximum output voltage swing is determined by the power supply voltage. From this determination, one may load and the approximate output resistance. The output calculate the maximum allowable power dissipation and, resistance is: after subtracting P , determine the maximum allowable load S current, which in turn can be used to determine the miniumum V R DROP = load impedance that may safely be driven. The calculation is OUT ILOAD summarized below. V is the voltage dropped within the amplifier output DROP T − T J(max) A stage. V and I can be determined from the V P = DROP LOAD O D(max) θ (output swing) portion of the appropriate Electrical Character- JA istics table. I is equal to the typical output high voltage LOAD θ = 200°C/W JA(MSOP-8) minus V+/2 and divided by R . For example, using the LOAD Electrical Characteristics DC (5V) table, the typical output high voltage drops 13mV using a 2kΩ load (connected to V+/
Driving Capacitive Loads
2), which produces an I of: Driving a capacitive load introduces phase-lag into the output LOAD signal, and this in turn reduces op-amp system phase margin. The application that is least forgiving of reduced phase 5.0V – 0.013V – 2.5V = 1.244mA margin is a unity gain amplifier. The MIC7122 can typically 2kΩ drive a 200pF capacitive load connected directly to the output Because of output stage symmetry, the corresponding typical when configured as a unity-gain amplifier and powered with output low voltage (13mV) also equals V . Then: a 2.2V supply. At 15V operation the circuit typically drives DROP 500pF. 0.013V
Using Large-Value Feedback Resistors
R = = 10 5
.
Ω OUT 0.001244A A large-value feedback resistor (> 500kΩ) can reduce the
Power Dissipation
phase margin of a system. This occurs when the feedback resistor acts in conjunction with input capacitance to create The MIC7122 output drive capability requires considering phase lag in the feedback signal. Input capacitance is usually power dissipation. If the load impedance is low, it is possible a combination of input circuit components and other parasitic to damage the device by exceeding the 125°C junction capacitance, such as amplifier input capacitance and stray temperature rating. printed circuit board capacitance. On-chip power consists of two components: supply power Figure 2 illustrates a method of compensating phase lag and output stage power. Supply power (P ) is the product of S caused by using a large-value feedback resistor. Feedback the supply voltage (V = V – V ) and supply current (I ). S V+ V– S capacitor C introduces sufficient phase lead to overcome Output stage power (P ) is the product of the output stage FB O the phase lag caused by feedback resistor R and input FB MIC7122 6 June 2005