Datasheet LTC6754 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungHigh Speed Rail-to-Rail Input Comparator with LVDS Compatible Outputs
Seiten / Seite22 / 10 — pin FuncTions (SC70/QFN) +IN (Pin 3/Pin 4):. SHDN (Pin 7) UD Only:. –IN …
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pin FuncTions (SC70/QFN) +IN (Pin 3/Pin 4):. SHDN (Pin 7) UD Only:. –IN (Pin 4/Pin 5):. LE/HYST (Pin 8) UD Only:

pin FuncTions (SC70/QFN) +IN (Pin 3/Pin 4): SHDN (Pin 7) UD Only: –IN (Pin 4/Pin 5): LE/HYST (Pin 8) UD Only:

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LTC6754
pin FuncTions (SC70/QFN) +IN (Pin 3/Pin 4):
Positive Input of the Comparator.
SHDN (Pin 7) UD Only:
Active Low Comparator Shut- The voltage range of this pin can go from VEE (–0.2V) down, threshold is 0.8V above VEE. If left unconnected, to VCCI (+0.1V). the comparator will be fully powered up.
–IN (Pin 4/Pin 5):
Negative Input of the Comparator.
LE/HYST (Pin 8) UD Only:
This pin allows the user to The voltage range of this pin can go from VEE (–0.2V) adjust the comparator’s hysteresis as well as latch the to VCCI (+0.1V). output if the pin voltage is pulled to within 400mV above
V
VEE. Hysteresis can be increased or disabled by voltage,
CCI (Pin 5/Pin 2):
Positive Supply Voltage for the Input Stage. The voltage between V current or a resistor to VEE. Leaving the pin unconnected CCI and VEE should be be- tween 2.4V and 5.25V. This pin is combined with V results in a typical hysteresis of 4.5mV. CCO in the SC70 package.
Q (Pin 1/Pin 12):
Positive Comparator Output. When the com-
V
parator outputs are differentially loaded with a 100Ω resistor,
CCO (Pin 5/Pin 1):
Positive Supply Voltage for the LVDS Output Stage. See the section High Speed Board Design Q swings to VOCM  +  VOD / 2 when +IN  >  –IN and Techniques for proper power supply layout and bypassing. VOCM – VOD / 2 when +IN < –IN, where VOCM and VOD are The voltage between V typically 1.26V and 360mV respectively for a supply of 5V. CCO and VEE should be between 2.4V and 5.25V.This pin is combined with VCCI in the
Q (Pin 6/Pin 10):
Negative Comparator Output. When the com- SC70 package. parator outputs are differentially loaded with a 100Ω resistor,
V
Q swings to VOCM  +  VOD  /  2 when +IN  <  –IN and
EE (Pin 2/Pins 3, 9):
Negative Power Supply, normally tied to ground. This can be tied to a voltage other than VOCM – VOD / 2 when +IN > –IN, where VOCM and VOD are ground as long as the constraints for total supply voltage typically 1.26V and 360mV respectively for a supply of 5V. relative to VCCI/VCCO are maintained.
block DiagraM
HYSTERESIS STAGE OUTPUT CURRENT VCCO VCCO V DRIVER STAGE CCI VEE VCCI + Q +IN + + VCCO INPUT GAIN I = 3.6mA, +IN < –IN STAGE + STAGE I = –3.6mA, +IN > –IN –IN – – Q VEE VEE VCCI VCCI VEE VEE 14.5k VEE Q + Q LE/HYST – 2 VCCI + 1.25V – COMMON ERROR MODE AMPLIFIER VEE + DETECTOR 350k VEE 6754 BD LE/HYST PIN INTERFACE SHDN +– 1.26V VEE VEE
Figure 1.
6754f 10 For more information www.linear.com/LTC6754 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts