Datasheet LT1715 (Analog Devices) - 4

LT1715
ELECTRICAL CHARACTERISTICS Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 8:
The power supply rejection ratio is measured with VCM = 1V and is may cause permanent damage to the device. Exposure to any Absolute defi ned as the worst of: the change in offset voltage from VCC = +VS = 2.7V Maximum Rating condition for extended periods may affect device to VCC = +VS = 6V (with VEE = 0V) divided by 3.3V or the change in offset reliability and lifetime. voltage from VEE = 0V to VEE = –6V (with VCC = +VS = 6V) divided by 6V.
Note 2:
The LT1715C is guaranteed functional over the operating range of
Note 9:
Because of internal hysteresis, there is no small-signal region in –40°C to 85°C. which to measure gain. Proper operation of internal circuity is ensured by
Note 3:
The LT1715C is guaranteed to meet specifi ed performance from measuring VOH and VOL with only 20mV of overdrive. 0°C to 70°C. The LT1715°C is designed, characterized and expected to
Note 10:
Maximum toggle rate is defi ned as the highest frequency at meet specifi ed performance from –40°C to 85°C but is not tested or which a 100mV sinusoidal input results in an error free output toggling to QA sampled at these temperatures. The LT1715I is guaranteed to meet greater than 4V when high and to less than 1V when low on a 5V output specifi ed performance from –40°C to 85°C. The LT1715H is guaranteed to supply. meet specifi ed performance from –40°C to 125°C.
Note 11:
Propagation delay measurements made with 100mV steps.
Note 4:
Thermal resistances vary depending upon the amount of PC board Overdrive is measured relative to V ± TRIP . metal attached to Pin 5 of the device. θJA is specifi ed for a 2500mm2 3/32"
Note 12:
tPD cannot be measured in automatic handling equipment with FR-4 board covered with 2oz copper on both sides and with 100mm2 of low values of overdrive. The LT1715 is 100% tested with a 100mV step copper attached to Pin 5. Thermal performance can be improved beyond and 20mV overdrive. Correlation tests have shown that tPD limits can be the given specifi cation by using a 4-layer board or by attaching more metal guaranteed with this test. area to Pin 5.
Note 13:
Propagation Delay Skew is defi ned as:
Note 5:
If one input is within these common mode limits, the other input tSKEW = |tPDLH – tPDHL| can go outside the common mode limits and the output will be valid.
Note 14:
Differential propagation delay is defi ned as the larger of the two:
Note 6:
The LT1715 comparator includes internal hysteresis. The trip ΔtPDLH = |tPDLHA – tPDLHB| points are the input voltage needed to change the output state in each ΔtPDHL = |tPDHLA – tPDHLB| direction. The offset voltage is defi ned as the average of V + – TRIP and VTRIP ,
Note 15:
Package inductances combined with asynchronous activity on while the hysteresis voltage is the difference of these two. the other channel can increase the output jitter. See Channel Interactions
Note 7:
The common mode rejection ratio is measured with VCC = 5V, in Applications Information. Specifi cation above is with one channel active VEE = –5V and is defi ned as the change in offset voltage measured from only. VCM = –5.1V to VCM = 3.8V, divided by 8.9V.
TYPICAL PERFORMANCE CHARACTERISTICS Input Offset and Trip Voltages Input Offset and Trip Voltages Input Common Mode Limits vs Supply Voltage vs Temperature vs Temperature
3 3 4.2 V + +V +V TRIP S = VCC = 5V S = VCC = 5V VCM = 1V V 4.0 EE = –5V 2 2 VEE = –5V V + TRIP 3.8 1 1 VOS V 3.6 OS 0 0 –4.8 –1 –1 V – TRIP –5.0 V – TRIP AND TRIP POINT VOLTAGE (mV) AND TRIP POINT VOLTAGE (mV) T OS –2 A = 25°C –2 –5.2 V OS VCM = 1V V COMMON MODE INPUT VOLTAGE (V) VEE = GND –3 –3 –5.4 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 –60 –40 –20 0 20 40 60 80 100 120 140 –50 –25 0 25 50 75 100 125 SUPPLY VOLTAGE, VCC = +VS (V) TEMPERATURE (°C) TEMPERATURE (°C) 1715 G01 1715 G02 1715 G03 1715fa 4