Datasheet AD8000 (Analog Devices) - 4

Data Sheet AD8000 SPECIFICATIONS WITH ±5 V SUPPLY
At TA = 25°C, VS = ±5 V, RL = 150 Ω, Gain = +2, RF = RG = 432 Ω, unless otherwise noted. Connect the exposed paddle to ground.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VO = 0.2 V p-p, SOIC/LFCSP 1580/1350 MHz G = +2, VO = 2 V p-p, SOIC/LFCSP 650/610 MHz Bandwidth for 0.1 dB Flatness VO = 2 V p-p, SOIC/LFCSP 190/170 MHz Slew Rate G = +2, VO = 4 V step 4100 V/μs Settling Time to 0.1% G = +2, VO = 2 V step 12 ns NOISE/HARMONIC PERFORMANCE Second/Third Harmonic VO = 2 V p-p, f = 5 MHz, LFCSP only 86/89 dBc Second/Third Harmonic VO = 2 V p-p, f = 20 MHz, LFCSP only 75/79 dBc Input Voltage Noise f = 100 kHz 1.6 nV/√Hz Input Current Noise f = 100 kHz, −IN 26 pA/√Hz f = 100 kHz, +IN 3.4 pA/√Hz Differential Gain Error NTSC, G = +2 0.02 % Differential Phase Error NTSC, G = +2 0.01 Degree DC PERFORMANCE Input Offset Voltage 1 10 mV Input Offset Voltage Drift 11 μV/°C Input Bias Current (Enabled) +IB −5 +4 μA −IB −3 +45 μA Transimpedance 570 890 1600 kΩ INPUT CHARACTERISTICS Noninverting Input Impedance 2/3.6 MΩ/pF Input Common-Mode Voltage Range −3.5 to +3.5 V Common-Mode Rejection Ratio VCM = ±2.5 V −52 −54 −56 dB Overdrive Recovery G = +1, f = 1 MHz, triangle wave 30 ns POWER DOWN PIN Power-Down Input Voltage Power-down < +VS – 3.1 V Enabled > +VS – 1.9 V Turn-Off Time 50% of power-down voltage to 150 ns 10% of VOUT final, VIN = 0.3 V p-p Turn-On Time 50% of power-down voltage to 300 ns 90% of VOUT final, VIN = 0.3 V p-p Input Bias Current Enabled −1.1 +0.17 +1.4 μA Power-Down −300 −235 −160 μA OUTPUT CHARACTERISTICS Output Voltage Swing RL = 100 Ω ±3.7 ±3.9 V Output Voltage Swing RL = 1 kΩ ±3.9 ±4.1 V Linear Output Current VO = 2 V p-p, second HD < −50 dBc 100 mA Overdrive Recovery G = + 2, f = 1 MHz, triangle wave 45 ns G = +2, VIN = 2.5 V to 0 V step 22 ns POWER SUPPLY Operating Range 4.5 12 V Quiescent Current 12.7 13.5 14.3 mA Quiescent Current (Power-Down) 1.1 1.3 1.65 mA Power Supply Rejection Ratio −PSRR/+PSRR −56/−61 −59/−63 dB Rev. C | Page 3 of 17 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS WITH ±5 V SUPPLY SPECIFICATIONS WITH +5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS INFORMATION CIRCUIT CONFIGURATIONS VIDEO LINE DRIVER LOW DISTORTION PINOUT EXPOSED PADDLE PRINTED CIRCUIT BOARD LAYOUT SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE