Datasheet AD795 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Low Power, Low Noise Precision FET Op Amp |
| Seiten / Seite | 21 / 9 — AD795. 120. 100. A) 25. B) d. +PSRR. T N. IO T. –OUTPUT CURRENT. RRE. … |
| Revision | C |
| Dateiformat / Größe | PDF / 334 Kb |
| Dokumentensprache | Englisch |
AD795. 120. 100. A) 25. B) d. +PSRR. T N. IO T. –OUTPUT CURRENT. RRE. –PSRR. CU T. +OUTPUT CURRENT. Y L P. IRCUI. R S. O P. –60. –40. –20. 140. 10k. 100k. 10M
Textversion des Dokuments
AD795 30 120 100 A) 25 B) d m ( ( N +PSRR T N IO T 80 –OUTPUT CURRENT C 20 RRE JE –PSRR CU T RE 60 +OUTPUT CURRENT Y L P 15 P IRCUI U -C 40 R S RT E HO W 10 S O P 20 5 0
9
–60 –40 –20 0 20 40 60 80 100 120 140
160
1 10 100 1k 10k 100k 1M 10M
01 5- 5-
TEMPERATURE (°C)
84
FREQUENCY (Hz)
84 00 00 Figure 16. Short-Circuit Current Limit vs. Temperature Figure 19. Power Supply Rejection vs. Frequency
10 120 8 ) 100 V 6 B ± d O 0.1% N ( T 4 IO 0 0.01% 80 CT OM 2 JE 0 G FR ERROR RE 60 IN DE W –2 O S -M T 0.01% N U 40 –4 O TP M 0.1% M OU –6 CO 20 –8 –10 0
0
3 4 5 6 7 8 9 10 11
170
1 10 100 1k 10k 100k 1M 10M
02 5- 5-
SETTLING TIME (µs)
84
FREQUENCY (Hz)
84 00 00 Figure 17. Output Swing and Error vs. Settling Time Figure 20. Common-Mode Rejection vs. Frequency
1000 120 120 ) 900 V (µ 100 100 E 800 PHASE AG T ) L 700 80 80 B O d rees) ( eg R V 600 IN 60 60 D ( GA IN RRO 500 G E GAIN R OOP A UT 40 40 400 P -L N N I E SE M E 300 A OP 20 20 UT PH L 200 O 0 0 ABS 100 0
8
–20 –20 –15 –10 –5 0 5 10 15
21 01
10 100 1k 10k 100k 1M 10M
0 5- 5-
INPUT COMMON-MODE VOLTAGE (V)
84
FREQUENCY (Hz)
84 00 00 Figure 18. Absolute Input Error Voltage vs. Input Common-Mode Voltage Figure 21. Open-Loop Gain and Phase Margin vs. Frequency Rev. C | Page 8 of 20 Document Outline Features Applications Connection Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Minimizing Input Current Circuit Board Notes Offset Nulling AC Response with High Value Source and Feedback Resistance Overload Issues Input Protection Preamplifier Applications Minimizing Noise Contributions Using a T Network A pH Probe Buffer Amplifier Outline Dimensions Ordering Guide
9
–60 –40 –20 0 20 40 60 80 100 120 140
160
1 10 100 1k 10k 100k 1M 10M
01 5- 5-
TEMPERATURE (°C)
84
FREQUENCY (Hz)
84 00 00 Figure 16. Short-Circuit Current Limit vs. Temperature Figure 19. Power Supply Rejection vs. Frequency
10 120 8 ) 100 V 6 B ± d O 0.1% N ( T 4 IO 0 0.01% 80 CT OM 2 JE 0 G FR ERROR RE 60 IN DE W –2 O S -M T 0.01% N U 40 –4 O TP M 0.1% M OU –6 CO 20 –8 –10 0
0
3 4 5 6 7 8 9 10 11
170
1 10 100 1k 10k 100k 1M 10M
02 5- 5-
SETTLING TIME (µs)
84
FREQUENCY (Hz)
84 00 00 Figure 17. Output Swing and Error vs. Settling Time Figure 20. Common-Mode Rejection vs. Frequency
1000 120 120 ) 900 V (µ 100 100 E 800 PHASE AG T ) L 700 80 80 B O d rees) ( eg R V 600 IN 60 60 D ( GA IN RRO 500 G E GAIN R OOP A UT 40 40 400 P -L N N I E SE M E 300 A OP 20 20 UT PH L 200 O 0 0 ABS 100 0
8
–20 –20 –15 –10 –5 0 5 10 15
21 01
10 100 1k 10k 100k 1M 10M
0 5- 5-
INPUT COMMON-MODE VOLTAGE (V)
84
FREQUENCY (Hz)
84 00 00 Figure 18. Absolute Input Error Voltage vs. Input Common-Mode Voltage Figure 21. Open-Loop Gain and Phase Margin vs. Frequency Rev. C | Page 8 of 20 Document Outline Features Applications Connection Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Minimizing Input Current Circuit Board Notes Offset Nulling AC Response with High Value Source and Feedback Resistance Overload Issues Input Protection Preamplifier Applications Minimizing Noise Contributions Using a T Network A pH Probe Buffer Amplifier Outline Dimensions Ordering Guide