Datasheet DS18B20 - 5

link to page 5 link to page 10 link to page 10 link to page 10 link to page 10 link to page 7 link to page 7 DS18B20 Programmable Resolution 1-Wire Digital Thermometer
Overview
DQ pin when the bus is high. The high bus signal also Figure 3 shows a block diagram of the DS18B20, and charges an internal capacitor (CPP), which then supplies pin descriptions are given in the Pin Description table. power to the device when the bus is low. This method of The 64-bit ROM stores the device’s unique serial code. deriving power from the 1-Wire bus is referred to as “para- The scratchpad memory contains the 2-byte temperature site power.” As an alternative, the DS18B20 may also be register that stores the digital output from the temperature powered by an external supply on VDD. sensor. In addition, the scratchpad provides access to the 1-byte upper and lower alarm trigger registers (T
Operation—Measuring Temperature
H and TL) and the 1-byte configuration register. The configura- The core functionality of the DS18B20 is its direct-to- tion register allows the user to set the resolution of the digital temperature sensor. The resolution of the tempera- temperature-to-digital conversion to 9, 10, 11, or 12 bits. ture sensor is user-configurable to 9, 10, 11, or 12 bits, The TH, TL, and configuration registers are nonvolatile corresponding to increments of 0.5°C, 0.25°C, 0.125°C, (EEPROM), so they will retain data when the device is and 0.0625°C, respectively. The default resolution at powered down. power-up is 12-bit. The DS18B20 powers up in a low- power idle state. To initiate a temperature measurement The DS18B20 uses Maxim’s exclusive 1-Wire bus proto- and A-to-D conversion, the master must issue a Convert col that implements bus communication using one control T [44h] command. Following the conversion, the resulting signal. The control line requires a weak pullup resistor thermal data is stored in the 2-byte temperature register since all devices are linked to the bus via a 3-state or in the scratchpad memory and the DS18B20 returns to its open-drain port (the DQ pin in the case of the DS18B20). idle state. If the DS18B20 is powered by an external sup- In this bus system, the microprocessor (the master ply, the master can issue “read time slots” (see the 1-Wire device) identifies and addresses devices on the bus Bus System section) after the Convert T command and using each device’s unique 64-bit code. Because each the DS18B20 will respond by transmitting 0 while the tem- device has a unique code, the number of devices that perature conversion is in progress and 1 when the con- can be addressed on one bus is virtually unlimited. The version is done. If the DS18B20 is powered with parasite 1-Wire bus protocol, including detailed explanations of the power, this notification technique cannot be used since commands and “time slots,” is covered in the 1-Wire Bus the bus must be pulled high by a strong pullup during the System section. entire temperature conversion. The bus requirements for Another feature of the DS18B20 is the ability to oper- parasite power are explained in detail in the Powering the ate without an external power supply. Power is instead DS18B20 section. supplied through the 1-Wire pullup resistor through the VPU MEMORY 4.7kΩ PARASITE POWER CIRCUIT CONTROL LOGIC
DS18B20
DQ TEMPERATURE SENSOR INTERNAL V ALARM HIGH TRIGGER (T DD GND 64-BIT ROM H) AND 1-Wire REGISTER (EEPROM) CPP PORT SCRATCHPAD ALARM LOW TRIGGER (TL) REGISTER (EEPROM) VDD POWER- CONFIGURATION SUPPLY SENSE REGISTER (EEPROM) 8-BIT CRC GENERATOR Figure 3. DS18B20 Block Diagram www.maximintegrated.com Maxim Integrated │ 5