Datasheet Texas Instruments SN65LVDS105PW — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN65LVDS105 |
| Artikelnummer | SN65LVDS105PW |
1 LVTTL: 4 LVDS Clock Fanout Buffer 16-TSSOP -40 bis 85
Datenblätter
SN65LVDS10x 4-Port LVDS and 4-Port TTL-to-LVDS Repeaters datasheet
PDF, 1.2 Mb, Revision: G, Datei veröffentlicht: Dec 31, 2015
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Verpackung
| Pin | 16 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 90 |
| Carrier | TUBE |
| Device Marking | LVDS105 |
| Width (mm) | 4.4 |
| Length (mm) | 5 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Herunterladen |
Parameter
| Input Frequency(Max) | 400 MHz |
| Input Level | LVTTL |
| Number of Outputs | 4 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 400 MHz |
| Output Level | LVDS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG |
| Rating | Catalog |
| VCC | 3.3 V |
| VCC Out | 3.3 V |
Öko-Plan
| RoHS | Compliant |
Modellreihe
Serie: SN65LVDS105 (7)
Herstellerklassifikation
- Semiconductors > Clock and Timing > Clock Buffers > Differential