Datasheet Microchip dsPIC33CH128MP505 — Datenblatt
| Hersteller | Microchip |
| Serie | dsPIC33CH128MP505 |
Dual Core, hohe Leistung
Datenblätter
Datasheet dsPIC33CH128MP508
PDF, 5.7 Mb, Sprache: en, Datei hochgeladen: Dec 29, 2020, Seiten: 822
28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD)
28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD)
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Detaillierte Beschreibung
Systementwickler, die hochwertige eingebettete Steuerungsanwendungen entwickeln, können von einem neuen digitalen Signalcontroller (DSC) mit zwei dsPIC-DSC-Kernen in einem einzigen Chip profitieren.Der dsPIC33CH verfügt über einen Kern, der als Master und der andere als Slave konzipiert ist. Der Slave-Kern ist nützlich, um dedizierten, zeitkritischen Steuercode auszuführen, während der Master-Kern die für die Endanwendung angepassten Funktionen für Benutzeroberfläche, Systemüberwachung und Kommunikation ausführt. Der dsPIC33CH wurde entwickelt, um die unabhängige Codeentwicklung für jeden Kern durch separate Designteams zu ermöglichen und eine nahtlose Integration zu ermöglichen, wenn sie in einem Chip zusammengeführt werden. Die dsPIC33CH-Familie ist für digitale Hochleistungsleistung, Motorsteuerung und andere eingebettete High-End-Anwendungen optimiert, die ausgefeilte Algorithmen erfordern.
Status
| DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO | |
|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Verpackung
| DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO | |
|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
| Package | UQFN | TQFP | TQFP | UQFN | TQFP | UQFN | TQFP | UQFN | TQFP | TQFP |
Parameter
| Parameters / Models | DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO |
|---|---|---|---|---|---|---|---|---|---|---|
| ADC Input | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 |
| Architecture | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| CPU Speed, MIPS/DMIPS | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 |
| CPU Type | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC |
| CTMU test | No | No | No | No | No | No | No | No | No | No |
| Configurable Logic Cell, CLC/CCL | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Crypto Engine | No | No | No | No | No | No | No | No | No | No |
| DAC Outputs | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Direct Memory Access Channels | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Graphics Controller/GPU | No | No | No | No | No | No | No | No | No | No |
| Hardware Cap Voltage Divider | False | False | False | False | False | False | False | False | False | False |
| Hardware RTCC/RTC | No | No | No | No | No | No | No | No | No | No |
| I2C | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| I2S | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| IrDA | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| LIN | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Lead Count | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 |
| Low Power | No | No | No | No | No | No | No | No | No | No |
| Max 16-Bit Digital Timers | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 |
| Max 32-Bit Digital Timers | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max ADC Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max ADC Sampling Rate, ksps | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 |
| Max DAC Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max I/O Pins | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 |
| Max PWM outputs, including complementary | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 |
| Number of ADCs | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of CAN Modules | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Number of Comparators | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of DACs | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of PWM Time Bases | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| Operation Voltage Max, V | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| Operation Voltage Min, V | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| PWM Max Resolution, Bits | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| PWM Resolution, ns | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 |
| Parallel Port | No | No | No | No | No | No | No | No | No | No |
| Peripheral Pin Select / Pin Muxing | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Peripheral Trigger Generator | True | True | True | True | True | True | True | True | True | True |
| Pincount | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 |
| Program Memory Size, KB | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 |
| Quadrature Encoder Interface | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| RAM, KB | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| SENT | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| SPI | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| Temp Range Max | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 |
| Temp Range Min | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 |
| UART | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| Vbat/Vddbu battery backup | No | No | No | No | No | No | No | No | No | No |
Andere Optionen
dsPIC33CH128MP502 dsPIC33CH128MP503 dsPIC33CH128MP506 dsPIC33CH128MP508 dsPIC33CH64MP502 dsPIC33CH64MP503 dsPIC33CH64MP505 dsPIC33CH64MP506 dsPIC33CH64MP508
Modellreihe
Serie: dsPIC33CH128MP505 (10)
Herstellerklassifikation
- MCUs/MPUs with Connectivity > CAN