Datasheet Microchip AT91SAM9263 — Datenblatt

ARM926EJ-S
(r0p4/r0p5) Technical Reference Manual Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM DDI0198D ARM926EJ-S
Technical Reference Manual
Copyright © 2001-2003 ARM Limited. All rights reserved.
Release Information
Change history
Date Issue Change 26 September 2001 A First release 29 January 2002 B Second release 5 December 2003 C Third release. Includes r0p5 changes. Defects corrected. 26 January 2004 D Fourth release. Includes r0p4. Technically identical to previous release. Proprietary Notice
Words and logos marked with ® or ™ are registered trademarks or trademarks owned by ARM Limited, except
as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the
trademarks of their respective owners.
Neither the whole nor any part of the information contained in, or the product described in, this document
may be adapted or reproduced in any material form except with the prior written permission of the copyright
holder.
The product described in this document is subject to continuous developments and improvements. All
particulars of the product and its use contained in this document are given by ARM in good faith. However,
all warranties implied or expressed, including but not limited to implied warranties of merchantability, or
fitness for purpose, are excluded.
This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable
for any loss or damage arising from the use of any information in this document, or any error or omission in
such information, or any incorrect use of the product.
Confidentiality Status
This document is Open Access. This document has no restriction on distribution. …

SAM9263
Atmel | SMART ARM-based Embedded MPU
DATASHEET Description
The Atmel ® | SMART ARM926-based SAM9263 32-bit microprocessor is
architectured on a 9-layer matrix, allowing a maximum internal bandwidth of nine
32-bit buses. It also features two independent external memory buses, EBI0 and
EBI1, capable of interfacing with a wide range of memory devices and an IDE
hard disk. Two external buses prevent bottlenecks, thus guaranteeing maximum
performance.
The SAM9263 embeds an LCD Controller supported by a Two D Graphics
Accelerator and a 2-channel DMA Controller, and one Image Sensor Interface. It
also integrates several standard peripherals, such as USART, SPI, TWI, Timer
Counters, PWM Generators, Multimedia Card Interface and one CAN Controller.
When coupled with an external GPS engine, the SAM9263 provides the ideal
solution for navigation systems. Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16 Features 2 ARM926EJ-S™ ARM® Thumb® Processor
̶ DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration
̶ 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
̶ 220 MIPS at 200 MHz
̶ Memory Management Unit
̶ EmbeddedICE™, Debug Communication Channel Support
̶ Mid-level Implementation Embedded Trace Macrocell™ Bus Matrix
̶ Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth
̶ Boot Mode Select Option, Remap Command Embedded Memories …