Datasheet Analog Devices AD9577 — Datenblatt
Hersteller | Analog Devices |
Serie | AD9577 |
Taktgenerator mit zwei PLLs, Spread Spectrum und Margining
Datenblätter
AD9577: Clock Generator with Dual PLLs, Spread Spectrum, and Margining Data Sheet
PDF, 802 Kb, Revision: A, Datei hochgeladen: Dec 25, 2018
Auszug aus dem Dokument
Preise
Status
AD9577BCPZ | AD9577BCPZ-R7 | AD9577BCPZ-RL | |
---|---|---|---|
Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Verpackung
AD9577BCPZ | AD9577BCPZ-R7 | AD9577BCPZ-RL | |
---|---|---|---|
N | 1 | 2 | 3 |
Package | 40 ld LFCSP (6x6mm w/4.6mm pad) | 40 ld LFCSP (6x6mm w/4.6mm pad) | 40 ld LFCSP (6x6mm w/4.6mm pad) |
Pins | 40 | 40 | 40 |
Package Code | CP-40-7 | CP-40-7 | CP-40-7 |
Parameter
Parameters / Models | AD9577BCPZ | AD9577BCPZ-R7 | AD9577BCPZ-RL |
---|---|---|---|
# Outputs | 4 | 4 | 4 |
Clock Function | Generation | Generation | Generation |
Interface | I²C | I²C | I²C |
On-Chip VCO or DCO | Yes | Yes | Yes |
Operating Temperature Range, °C | -40 to 85 | -40 to 85 | -40 to 85 |
Output Frequency(max), Hz | 637.5M | 637.5M | 637.5M |
Output Logic | CMOS, LVDS, LVPECL | CMOS, LVDS, LVPECL | CMOS, LVDS, LVPECL |
Power(typ), W | 1 | 1 | 1 |
Ref Clock(max), Hz | 54M | 54M | 54M |
Ref Clock(min), Hz | 19.44M | 19.44M | 19.44M |
Öko-Plan
AD9577BCPZ | AD9577BCPZ-R7 | AD9577BCPZ-RL | |
---|---|---|---|
RoHS | Compliant | Compliant | Compliant |
Modellreihe
Serie: AD9577 (3)
Herstellerklassifikation
- Clock & Timing > Clock Generation Devices