Datasheet Texas Instruments SN412016DRE4 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | REF1004-2.5 |
| Artikelnummer | SN412016DRE4 |
Mikropower-Spannungsreferenz 8-SOIC 0 bis 70
Datenblätter
Micropower Voltage Reference datasheet
PDF, 248 Kb, Datei veröffentlicht: Sep 27, 2000
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 8 | 8 |
| Package Type | D | D |
| Industry STD Term | SOIC | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 2500 | 2500 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | REF | 0425 |
| Width (mm) | 3.91 | 3.91 |
| Length (mm) | 4.9 | 4.9 |
| Thickness (mm) | 1.58 | 1.58 |
| Pitch (mm) | 1.27 | 1.27 |
| Max Height (mm) | 1.75 | 1.75 |
| Mechanical Data | Herunterladen | Herunterladen |
Parameter
| Initial Accuracy(Max) | 0.8 % |
| Iout/Iz(Max) | 20 mA |
| Min Iz for Regulation | 12 uA |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
| Pin/Package | 8SOIC |
| Rating | Catalog |
| Reference Voltage | Fixed |
| Temp Coeff(Typ) | 20 ppm/ degree C |
| VO | 2.5 V |
| VO Adj(Max) | 2.5 V |
| VO Adj(Min) | 2.5 V |
| WBN 10-10 kHz(Typ) | 120 uVrms |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- Comparing the ADS1201 to the CS5321 [745k]PDF, 212 Kb, Datei veröffentlicht: Sep 27, 2000
The intent of this application bulletin is to provide a simple means of comparing the operation of the ADS1201 delta-sigma modulator to Crystal's CS5321 delta-sigma modulator. It is not the intent of this document to descibe the theory or the operation behind delta-sigma modulators, it is merely to provide the methodology, configuration, and results of tests that were performed using these modulat - How to get 23 bits of effective resolution from your 24-bit converterPDF, 96 Kb, Datei veröffentlicht: Sep 27, 2000
The ADS1210 and ADS1211 are precision, wide dynamic range, delta-sigma A/D converters that have 24 bits of no missing code and up to 23 bits rms of effective resolution. Because of the nature of the delta-sigma design architecture the circuit designer has control over more of the variables and interface options in the A/D's conversion process than is realizable with other converter architectures. - Remove the DC Portion of Signals with the ADS7817PDF, 55 Kb, Datei veröffentlicht: Sep 27, 2000
Unwanted portions of a signal, such as a DC pedestal, can be difficult to reject in a single supply circuit. A DC pedestal voltage most typically appears at the output of an operational amplifier with a small signal riding on top of it. This pedestal voltage is required in the analog domain to insure that the small signal that contains the pertinent information never falls below the ground potenti
Modellreihe
Serie: REF1004-2.5 (7)
Herstellerklassifikation
- Semiconductors > Power Management > Voltage Reference > Shunt Voltage Reference